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SN75ALS162_14

更新时间： 2024-11-21 02:58:47
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德州仪器 - TI /
页数 文件大小 规格书
12页 183K
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OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER

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SN75ALS162  
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER  
SLLS020C – JUNE 1986 – REVISED MAY 1995  
DW PACKAGE  
Meets IEEE Standard 488-1978 (GPIB)  
(TOP VIEW)  
8-Channel Bidirectional Transceiver  
Designed to Implement Control Bus  
Interface  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
SC  
TE  
REN  
IFC  
NDAC  
NRFD  
DAV  
EOI  
ATN  
SRQ  
NC  
V
CC  
NC  
2
Designed for Multicontrollers  
3
REN  
IFC  
NDAC  
NRFD  
DAV  
EOI  
ATN  
SRQ  
NC  
High-Speed Advanced Low-Power Schottky  
Circuitry  
4
5
GPIB  
I/O Ports  
Low-Power Dissipation . . . 46 mW Max per  
Channel  
6
Terminal  
I/O Ports  
7
8
Fast Propagation Times . . . 20 ns Max  
High-Impedance PNP Inputs  
9
10  
11  
12  
Receiver Hysteresis . . . 650 mV Typ  
Bus-Terminating Resistors Provided on  
Driver Outputs  
GND  
DC  
No Loading of Bus When Device Is  
N PACKAGE  
(TOP VIEW)  
Powered Down (V  
= 0)  
CC  
Power-Up/Power-Down Protection  
(Glitch Free)  
SC  
TE  
REN  
IFC  
NDAC  
NRFD  
DAV  
EOI  
1
22  
V
CC  
21 NC  
20 REN  
IFC  
18 NDAC  
2
description  
3
4
19  
The SN75ALS162 eight-channel general-purpose  
interface bus (GPIB) transceiver is a monolithic,  
high-speed, advanced low-power Schottky process  
device designed to provide the bus-management  
and data-transfer signals between operating units  
of a multiple-controller instrumentation system.  
When combined with the SN75ALS160 octal bus  
transceiver, the SN75ALS162 provides the  
complete 16-wire interface for the IEEE 488 bus.  
5
GPIB  
I/O Ports  
6
17  
16  
15  
14  
13  
12  
NRFD  
DAV  
EOI  
ATN  
SRQ  
DC  
Terminal  
I/O Ports  
7
8
9
ATN  
SRQ  
GND  
10  
11  
The SN75ALS162 features eight driver-receiver  
pairs connected in a front-to-back configuration to  
form input/output (I/O) ports at both the bus and  
terminal sides. The direction of data through these  
driver-receiver pairs is determined by the DC, TE,  
and SC enable signals. The SC input allows the  
REN and IFC transceivers to be controlled  
independently.  
NC–No internal connection  
The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high  
impedance to the bus when V = 0. The drivers are designed to handle loads up to 48 mA of sink current. Each  
CC  
receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV minimum for  
increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when  
disabled.  
The SN75ALS162 is characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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SN75ALS162DWRE4 TI

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