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SN74LVTT240

更新时间： 2024-10-02 09:12:27
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德州仪器 - TI 驱动器输出元件
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6页 102K
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3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN54LVTT240, SN74LVTT240  
3.3-V ABT OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCES005 – FEBRUARY 1995  
SN54LVTT240 . . . J OR W PACKAGE  
SN74LVTT240 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
• State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
• Supports Mixed-Mode Signal Operation  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
(5-V Input and Output Voltages With  
3.3-V V  
)
CC  
• Supports Unregulated Battery Operation  
Down to 2.7 V  
• Typical V  
(Output Ground Bounce)  
OLP  
< 0.8 V at V  
= 3.3 V, T = 25°C  
13 2A2  
12 1Y4  
CC  
A
• Latch-Up Performance Exceeds 500 mA  
11  
2A1  
Per JEDEC Standard JESD-17  
• Supports Live Insertion  
SN54LVTT240 . . . FK PACKAGE  
(TOP VIEW)  
• Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Ceramic Flat (W) Packages, and Ceramic  
(J) DIPs  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
description  
These octal buffers and line drivers are designed  
specifically for low-voltage (3.3-V) V operation,  
9 10 11 12 13  
CC  
but with the capability to provide a TTL interface to  
a 5-V system environment.  
The ’LVTT240 is organized as two 4-bit buffer/line  
drivers with separate output-enable (OE) inputs.  
When OE is low, the device passes data from the  
A inputs to the Y outputs. When OE is high, the  
outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74LVTT240 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54LVTT240 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVTT240 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
L
H
Z
H
X
Copyright 1995, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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SN74LVTT240 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVT240A TI

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SN74LVTT240DBLE TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SSOP-20
SN74LVTT240DBR TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, SSOP-20
SN74LVTT240DW TI

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SN74LVTT240DWR TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SO-20
SN74LVTT240J TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDIP20, CERAMIC, DIP-20
SN74LVTT240OR TI

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 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTT240PW TI

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 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTT240PWLE TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, PLASTIC, TSSOP-20
SN74LVTT240PWR TI

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 		LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, TSSOP-20

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