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SN74LVTT240W PDF预览

SN74LVTT240W

更新时间： 2024-11-14 12:58:55
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
6页 102K
描述
LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, CDFP20, CERAMIC, DFP-20

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SN74LVTT240W 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：CERAMIC, DFP-20针数：20
Reach Compliance Code：unknown风险等级：5.56
Is Samacsys：N系列：LVT
JESD-30 代码：R-GDFP-F20长度：13.09 mm
逻辑集成电路类型：BUS DRIVER位数：4
功能数量：2端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK传播延迟（tpd）：4 ns
认证状态：Not Qualified座面最大高度：2.54 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL宽度：6.92 mm
Base Number Matches：1

SN74LVTT240W 数据手册

 浏览型号SN74LVTT240W的Datasheet PDF文件第2页浏览型号SN74LVTT240W的Datasheet PDF文件第3页浏览型号SN74LVTT240W的Datasheet PDF文件第4页浏览型号SN74LVTT240W的Datasheet PDF文件第5页浏览型号SN74LVTT240W的Datasheet PDF文件第6页 
SN54LVTT240, SN74LVTT240  
3.3-V ABT OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCES005 – FEBRUARY 1995  
SN54LVTT240 . . . J OR W PACKAGE  
SN74LVTT240 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
• State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
• Supports Mixed-Mode Signal Operation  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
(5-V Input and Output Voltages With  
3.3-V V  
)
CC  
• Supports Unregulated Battery Operation  
Down to 2.7 V  
• Typical V  
(Output Ground Bounce)  
OLP  
< 0.8 V at V  
= 3.3 V, T = 25°C  
13 2A2  
12 1Y4  
CC  
A
• Latch-Up Performance Exceeds 500 mA  
11  
2A1  
Per JEDEC Standard JESD-17  
• Supports Live Insertion  
SN54LVTT240 . . . FK PACKAGE  
(TOP VIEW)  
• Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Ceramic Flat (W) Packages, and Ceramic  
(J) DIPs  
3
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
17  
16  
15  
14  
description  
These octal buffers and line drivers are designed  
specifically for low-voltage (3.3-V) V operation,  
9 10 11 12 13  
CC  
but with the capability to provide a TTL interface to  
a 5-V system environment.  
The ’LVTT240 is organized as two 4-bit buffer/line  
drivers with separate output-enable (OE) inputs.  
When OE is low, the device passes data from the  
A inputs to the Y outputs. When OE is high, the  
outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74LVTT240 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54LVTT240 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVTT240 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
L
H
Z
H
X
Copyright 1995, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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