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SN74LVTH16240_07

更新时间： 2024-09-10 05:29:31
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德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 224K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74LVTH16240_07 数据手册

 浏览型号SN74LVTH16240_07的Datasheet PDF文件第2页浏览型号SN74LVTH16240_07的Datasheet PDF文件第3页浏览型号SN74LVTH16240_07的Datasheet PDF文件第4页浏览型号SN74LVTH16240_07的Datasheet PDF文件第5页浏览型号SN74LVTH16240_07的Datasheet PDF文件第6页浏览型号SN74LVTH16240_07的Datasheet PDF文件第7页 
SN54LVTH16240, SN74LVTH16240  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS684D–MARCH 1997–REVISED DECEMBER 2006  
FEATURES  
SN54LVTH16240 . . . WD PACKAGE  
SN74LVTH16240 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
•
Members of the Texas Instruments Widebus™  
Family  
•
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V Operation  
and Low Static-Power Dissipation  
48 2OE  
47 1A1  
46 1A2  
45 GND  
44 1A3  
43 1A4  
42 VCC  
41 2A1  
40 2A2  
39 GND  
38 2A3  
37 2A4  
36 3A1  
35 3A2  
34 GND  
33 3A3  
32 3A4  
31 VCC  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
VCC  
1
2
3
•
•
•
•
•
•
•
•
•
Support Mixed-Mode Signal Operation (5-V  
4
Input and Output Voltages With 3.3-V VCC  
)
5
Support Unregulated Battery Operation Down  
to 2.7 V  
6
7
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
VCC  
8
9
Ioff and Power-Up 3-State Support Hot  
Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Distributed VCC and GND Pin Configuration  
Minimizes High-Speed Switching Noise  
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
•
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package Using  
25-mil Center-to-Center Spacings  
DESCRIPTION/ORDERING INFORMATION  
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the  
capability to provide a TTL interface to a 5-V system environment.  
The 'LVTH16240 devices are designed specifically to improve both the performance and density of 3-state  
memory address drivers, clock drivers, and bus-oriented receivers and transmitters.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVTH16240DLR  
TOP-SIDE MARKING  
Reel of 1000  
SN74LVTH16240DLRG4  
SN74LVTH16240DL  
SSOP – DL  
LVTH16240  
–40°C to 85°C  
Tube of 25  
SN74LVTH16240DLG4  
74LVTH16240DGGRE4  
SN74LVTH16240DGGR  
TSSOP – DGG  
Reel of 2000  
LVTH16240  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...13

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SN74LVTH16241 TI

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SN74LVTH16241DGG TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16241DGGR TI

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 		具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、2.7V 至 3.6

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