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SN74LVTH16244BDGG

更新时间： 2024-11-23 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
19页 490K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74LVTH16244BDGG 数据手册

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SN54LVTH16244A, SN74LVTH16244A  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS142Q–MAY 1992–REVISED OCTOBER 2005  
FEATURES  
SN54LVTH16244A . . . WD PACKAGE  
SN74LVTH16244A . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Members of the Texas Instruments  
Widebus ™ Family  
•
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
4
•
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
5
6
3.3-V VCC  
)
7
V
CC  
V
CC  
•
•
•
•
•
•
Support Unregulated Battery Operation  
Down to 2.7 V  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
9
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Ioff and Power-Up 3-State Support Hot  
Insertion  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Latch-Up Performance Exceeds 500 mA  
Per JESD 17  
V
CC  
V
CC  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
DESCRIPTION/ORDERING INFORMATION  
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but  
with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four  
4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical  
active-low output-enable (OE) inputs.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.  
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry  
disables the outputs, preventing damaging current backflow through the devices when they are powered down.  
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,  
which prevents driver conflict.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1992–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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