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SN74LVTH16240DL PDF预览

SN74LVTH16240DL

更新时间： 2024-09-09 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
11页 184K
描述
3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74LVTH16240DL 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP, SSOP48,.4针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：0.75
控制类型：ENABLE LOW计数方向：UNIDIRECTIONAL
系列：LVTJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：15.88 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：4功能数量：4
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP48,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH包装方法：TUBE
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：5 mAProp。Delay @ Nom-Sup：3.5 ns
传播延迟（tpd）：4 ns认证状态：Not Qualified
座面最大高度：2.79 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：7.49 mmBase Number Matches：1

SN74LVTH16240DL 数据手册

 浏览型号SN74LVTH16240DL的Datasheet PDF文件第2页浏览型号SN74LVTH16240DL的Datasheet PDF文件第3页浏览型号SN74LVTH16240DL的Datasheet PDF文件第4页浏览型号SN74LVTH16240DL的Datasheet PDF文件第5页浏览型号SN74LVTH16240DL的Datasheet PDF文件第6页浏览型号SN74LVTH16240DL的Datasheet PDF文件第7页 
SN54LVTH16240, SN74LVTH16240  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS684C – MARCH 1997 – REVISED APRIL 1999  
SN54LVTH16240 . . . WD PACKAGE  
SN74LVTH16240 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1
2
3
4
5
6
7
8
9
48 2OE  
47 1A1  
46 1A2  
45 GND  
44 1A3  
43 1A4  
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
3.3-V V  
)
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
V
42  
V
CC  
CC  
2Y1  
2Y2  
41 2A1  
40 2A2  
39 GND  
38 2A3  
37 2A4  
36 3A1  
35 3A2  
34 GND  
33 3A3  
32 3A4  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
GND 10  
2Y3 11  
2Y4 12  
3Y1 13  
3Y2 14  
GND 15  
3Y3 16  
3Y4 17  
= 3.3 V, T = 25°C  
CC  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
V
18  
31  
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
4Y1 19  
4Y2 20  
GND 21  
4Y3 22  
4Y4 23  
4OE 24  
30 4A1  
29 4A2  
28 GND  
27 4A3  
26 4A4  
25 3OE  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) V  
capability to provide a TTL interface to a 5-V system environment.  
operation, but with the  
CC  
The ’LVTH16240 devices are designed specifically to improve both the performance and density of 3-state  
memory address drivers, clock drivers, and bus-oriented receivers and transmitters.  
The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide  
inverting outputs and symmetrical active-low output-enable (OE) inputs.  
When V is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V  
through a pullup resistor;  
CC  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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SN74LVTH16240DL 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVT16240DLG4 TI

完全替代

 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16240DLRG4 TI

完全替代

 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16240DLG4 TI

完全替代

 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

与SN74LVTH16240DL相关器件

型号 品牌 获取价格 描述 数据表
SN74LVTH16240DLG4 TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16240DLR TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16240DLRG4 TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16240-EP TI

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 		3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVTH16241 TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16241DGG TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16241DGGR TI

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 		具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、2.7V 至 3.6
SN74LVTH16241DGVR TI

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 		LVT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, TSOP-48
SN74LVTH16241DL TI

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 		3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVTH16241DLR TI

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 		暂无描述

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