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SN74LVC2G74DCT3 PDF预览

SN74LVC2G74DCT3

更新时间: 2023-06-19 15:35:03
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
15页 352K
描述
具有清零和预置端的单路正边沿触发式 D 型触发器 | DCT | 8 | -40 to 125

SN74LVC2G74DCT3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:LSSOP,
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:5.57系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G8JESD-609代码:e6
长度:2.95 mm逻辑集成电路类型:D FLIP-FLOP
最大I(ol):0.032 A湿度敏感等级:1
位数:1功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
传播延迟(tpd):16 ns座面最大高度:1.3 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Bismuth (Sn/Bi)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
触发器类型:POSITIVE EDGE宽度:2.8 mm
最小 fmax:140 MHzBase Number Matches:1

SN74LVC2G74DCT3 数据手册

 浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第2页浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第3页浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第4页浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第5页浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第6页浏览型号SN74LVC2G74DCT3的Datasheet PDF文件第7页 
SN74LVC2G74  
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH CLEAR AND PRESET  
www.ti.com  
SCES203KAPRIL 1999REVISED JUNE 2005  
FEATURES  
DCT OR DCU PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
CLK  
D
Q
GND  
V
CC  
1
2
3
4
8
7
6
5
Supports 5-V VCC Operation  
PRE  
CLR  
Q
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.9 ns at 3.3 V  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
YEA, YEP, YZA, OR YZP PACKAGE  
(BOTTOM VIEW)  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
4
3
2
1
5
6
7
8
GND  
Q
Q
CLR  
PRE  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
D
CLK  
Ioff Supports Partial-Power-Down Mode  
Operation  
V
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)  
NanoStar™  
WCSP (DSBGA) – YEA  
SN74LVC2G74YEAR  
NanoFree™  
WCSP (DSBGA) – YZA (Pb-free)  
SN74LVC2G74YZAR  
_ _ _CP_  
Reel of 3000  
NanoStar™ – WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
SN74LVC2G74YEPR  
–40°C to 85°C  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SN74LVC2G74YZPR  
SSOP – DCT  
Reel of 3000  
Reel of 3000  
Reel of 250  
SN74LVC2G74DCTR  
SN74LVC2G74DCUR  
SN74LVC2G74DCUT  
C74_ _ _  
C74_  
VSSOP – DCU  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.  
DCU: The actual top-side marking has one additional character that designates the assembly/test site.  
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1999–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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