Datasheet > SN74LVC2G14_15

SN74LVC2G14_15

更新时间： 2024-11-20 02:58:19

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
15页	578K
描述
Dual Schmitt-Trigger Inverter

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SN74LVC2G14_15 数据手册

SN74LVC2G14

DUAL SCHMITT-TRIGGER INVERTER

www.ti.com

SCES200L–APRIL 1999–REVISED JANUARY 2007

FEATURES

•

Available in the Texas Instruments

NanoFree™ Package

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

•

Supports 5-V V_CCOperation

I_offFeature Supports Partial-Power-Down

Mode Operation

Inputs Accept Voltages to 5.5 V

Max t_pdof 5.4 ns at 3.3 V

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

Low Power Consumption, 10-µA Max I_CC

±24-mA Output Drive at 3.3 V

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

1000-V Charged-Device Model (C101)

Typical V_OLP(Output Ground Bounce)

<0.8 V at V_CC= 3.3 V, T_A= 25°C

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

GND

See mechanical drawings for dimensions.

DESCRIPTION/ORDERING INFORMATION

This dual Schmitt-trigger inverter is designed for 1.65-V to 5.5-V V_CCoperation.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

The SN74LVC2G14 contains two inverters and performs the Boolean function Y = A. The device functions as

two independent inverters, but because of Schmitt action, it may have different input threshold levels for

positive-going (V_T+) and negative-going (V_T–) signals.

This device is fully specified for partial-power-down applications using I_off. The I_offcircuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾

ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC2G14YZPR

_ _ _CF_

C14_

0.23-mm Large Bump – YZP (Pb-free)

SOT (SOT-23) – DBV

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

SN74LVC2G14DBVR

SN74LVC2G14DBVT

SN74LVC2G14DCKR

SN74LVC2G14DCKT

–40°C to 85°C

SOT (SC-70) – DCK

CF_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...15

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与SN74LVC2G14_15相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC2G14DBV	TI	获取价格	LVC/LCX/Z SERIES, DUAL 1-INPUT INVERT GATE, PDSO6
SN74LVC2G14DBVR	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DBVR	UMW	获取价格	逻辑集成电路
SN74LVC2G14DBVRE4	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DBVRG4	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DBVT	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DBVTE4	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DBVTG4	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER
SN74LVC2G14DCK3	TI	获取价格	具有施密特触发输入的 2 通道、1.65V 至 5.5V 反相器 \| DCK \| 6 \|
SN74LVC2G14DCKR	TI	获取价格	DUAL SCHMITT-TRIGGER INVERTER

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