Datasheet > SN74LVC2G14DBVR

SN74LVC2G14DBVR

更新时间： 2024-11-20 17:14:59

品牌	Logo	应用领域
友台半导体 - UMW		逻辑集成电路
页数	文件大小	规格书
8页	944K
描述
逻辑集成电路

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SN74LVC2G14DBVR 数据手册

UMW

SN74LVC2G14

Features

General Description

The SN74LVC2G14 is a high performance dual

inverter with Schm itt−Trigge r inputs operating from a

1.65 to 5.5 V supply. Pin configuration and function are

the same as the SN74LVC2G04, but the inputs ha

ve hysteresis and, with its Schmitt trigger function,

the SN74LVC2G14 can be used as a line receiver which

will receive slow input signals.

Designed for 1.65V to 5.5V V_CCOperation

Over Voltage Tolerant Inputs and Outputs

●

LVTTL Compatible − Interface Capability with

5V TTL Logic with V_CC= 3V

LVCMOS Compatible

●

24 mA Balanced Output Sink and Source

Capability

Near Zero Static Supply Current Substantially

Reduces System Power Requirements

The SN74LVC2G14 is capable of transforming

slowly changing input signals into sharply defined,

jitter−freeoutput signals. In addition, it has a greater noise

margin than conventional inverters.

●

Current

Drive Capability is 24 mA at the Outputs

●

Chip Complexity: FET = 72

These Devices are Pb−Free and are RoHS

Compliant

The SN74LVC2G14 has hysteresis between the

positive−going and the negativ e−going input thresholds

(typically 1V) which is determined internally by

transistor radios and is essentially insensitive to

temperature and supply voltage variations.

Pin Configuration

Pin Function

ASSIGNMENT

IN A1

GND

IN A2

——

VCC

——

www.umw-ic.com

UTD Semiconductor Co.,Limited

12 3 4 5 6 7 8

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