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SN74LVC1G240_08 PDF预览

SN74LVC1G240_08

更新时间: 2024-11-18 05:29:35
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德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
14页 494K
描述
SINGLE BUFFER/DRIVER WITH 3-STATE OUTPUT

SN74LVC1G240_08 数据手册

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SN74LVC1G240  
SINGLE BUFFER/DRIVER  
WITH 3-STATE OUTPUT  
www.ti.com  
SCES305JJANUARY 2001REVISED JANUARY 2007  
FEATURES  
Available in the Texas Instruments  
NanoFree™ Package  
Ioff Supports Partial-Power-Down Mode  
Operation  
Supports 5-V VCC Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
Inputs Accept Voltages to 5.5 V  
Max tpd of 3.7 ns at 3.3 V  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
YZP PACKAGE  
(BOTTOM VIEW)  
3
2
1
4
5
GND  
A
Y
VCC  
1
2
3
5
4
OE  
VCC  
1
2
3
5
4
OE  
A
A
VCC  
OE  
GND  
Y
GND  
Y
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This single buffer/driver is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable  
(OE) input is high.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
Reel of 3000  
SN74LVC1G240YZPR  
_ _ _CK_  
0.23-mm Large Bump – YZP (Pb-free)  
SOT (SOT-23) – DBV  
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
SN74LVC1G240DBVR  
SN74LVC1G240DBVT  
SN74LVC1G240DCKR  
SN74LVC1G240DCKT  
C40_  
CK_  
–40°C to 85°C  
SOT (SC-70) – DCK  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2001–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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