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SN74LVC1G27DBVR

更新时间： 2024-11-04 23:11:03
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德州仪器 - TI 输入元件
页数 文件大小 规格书
12页 235K
描述
SINGLE 3-INPUT POSITIVE-NOR GATE

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SN74LVC1G27DBVR 数据手册

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SN74LVC1G27  
SINGLE 3-INPUT POSITIVE-NOR GATE  
www.ti.com  
SCES488B–SEPTEMBER 2003–REVISED MARCH 2005  
FEATURES  
DBV OR DCK PACKAGE  
(TOP VIEW)  
•
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1
2
3
6
5
4
A
GND  
B
C
•
•
•
•
•
•
Supports 5-V VCC Operation  
V
Y
CC  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.5 ns at 3.3 V  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Ioff Supports Partial-Power-Down Mode  
Operation  
3
2
1
4
5
6
B
GND  
A
Y
V
CC  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
C
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC1G27 performs the Boolean function Y = A + B + C or Y = A B C in positive logic.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
NanoStar™ – WCSP (DSBGA)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
SN74LVC1G27YEPR  
0.23-mm Large Bump – YEP  
Tape and reel  
_ _ _CU_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP  
(Pb-free)  
SN74LVC1G27YZPR  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
Tape and reel  
Tape and reel  
SN74LVC1G27DBVR  
SN74LVC1G27DCKR  
C27_  
CU_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
H
X
X
L
B
X
H
X
L
C
X
X
H
L
L
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...12

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SN74LVC1G27DBVR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC1G27DBVRE4 TI

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 Single 3-Input Positive-NOR Gate 6-SOT-23 -40 to 125

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SN74LVC1G27DSFR TI

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