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SN74LVC1G27YEPR PDF预览

SN74LVC1G27YEPR

更新时间： 2024-11-04 22:11:19
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
12页 235K
描述
SINGLE 3-INPUT POSITIVE-NOR GATE

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SN74LVC1G27YEPR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：VFBGA, BGA6,2X3,20
针数：6Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.55系列：LVC/LCX/Z
JESD-30 代码：R-XBGA-B6长度：1.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：NOR GATE
最大I（ol）：0.024 A功能数量：1
输入次数：3端子数量：6
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE封装主体材料：UNSPECIFIED
封装代码：VFBGA封装等效代码：BGA6,2X3,20
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 VProp。Delay @ Nom-Sup：5.4 ns
传播延迟（tpd）：20.5 ns认证状态：Not Qualified
施密特触发器：NO座面最大高度：0.5 mm
子类别：Gates最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：0.9 mm
Base Number Matches：1

SN74LVC1G27YEPR 数据手册

 浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第2页浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第3页浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第4页浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第5页浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第6页浏览型号SN74LVC1G27YEPR的Datasheet PDF文件第7页 
SN74LVC1G27  
SINGLE 3-INPUT POSITIVE-NOR GATE  
www.ti.com  
SCES488B–SEPTEMBER 2003–REVISED MARCH 2005  
FEATURES  
DBV OR DCK PACKAGE  
(TOP VIEW)  
•
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1
2
3
6
5
4
A
GND  
B
C
•
•
•
•
•
•
Supports 5-V VCC Operation  
V
Y
CC  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.5 ns at 3.3 V  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Ioff Supports Partial-Power-Down Mode  
Operation  
3
2
1
4
5
6
B
GND  
A
Y
V
CC  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
C
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC1G27 performs the Boolean function Y = A + B + C or Y = A B C in positive logic.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
NanoStar™ – WCSP (DSBGA)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
SN74LVC1G27YEPR  
0.23-mm Large Bump – YEP  
Tape and reel  
_ _ _CU_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP  
(Pb-free)  
SN74LVC1G27YZPR  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
Tape and reel  
Tape and reel  
SN74LVC1G27DBVR  
SN74LVC1G27DCKR  
C27_  
CU_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition  
(1 = SnPb, = Pb-free).  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
H
X
X
L
B
X
H
X
L
C
X
X
H
L
L
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...12

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