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SN74LVC1G126-Q1_V01 PDF预览

SN74LVC1G126-Q1_V01

更新时间: 2024-11-06 02:58:31
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描述
SN74LVC1G126-Q1 Single Bus Buffer Gate With 3-State Output

SN74LVC1G126-Q1_V01 数据手册

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SN74LVC1G126-Q1  
www.ti.com............................................................................................................................................................. SCES467BJULY 2003REVISED APRIL 2008  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
1
FEATURES  
Qualified for Automotive Applications  
DBV PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
2
3
5
4
OE  
A
VCC  
Y
Supports 5-V VCC Operation  
GND  
Inputs Accept Voltages to 5.5 V  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DESCRIPTION/ORDERING INFORMATION  
This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC1G126-Q1 is a single line driver with a 3-state output. The output is disabled when the  
output-enable (OE) input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(3)  
C26_  
–40°C to 125°C  
SOT (SOT-23) – DBV Reel of 3000  
1P1G126QDBVRQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(3) DBV: The actual top-side marking has one additional character that designates the wafer fab/assembly site.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
H
A
H
L
H
L
H
L
X
Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2003–2008, Texas Instruments Incorporated  

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