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SN74LVC1G11_15 PDF预览

SN74LVC1G11_15

更新时间： 2024-02-29 11:47:33
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德州仪器 - TI 栅
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14页 613K
描述
Single 3-Input Positive-AND Gate

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SN74LVC1G11_15 数据手册

 浏览型号SN74LVC1G11_15的Datasheet PDF文件第2页浏览型号SN74LVC1G11_15的Datasheet PDF文件第3页浏览型号SN74LVC1G11_15的Datasheet PDF文件第4页浏览型号SN74LVC1G11_15的Datasheet PDF文件第5页浏览型号SN74LVC1G11_15的Datasheet PDF文件第6页浏览型号SN74LVC1G11_15的Datasheet PDF文件第7页 
SN74LVC1G11  
SINGLE 3-INPUT POSITIVE-AND GATE  
www.ti.com  
SCES487D–SEPTEMBER 2003–REVISED JANUARY 2007  
FEATURES  
•
Available in the Texas Instruments  
NanoFree™ Package  
Operation  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
•
•
•
•
•
•
Supports 5-V VCC Operation  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.1 ns at 3.3 V  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Low Power Consumption, 10-µA Max ICC  
±24-mA Output Drive at 3.3 V  
Ioff Supports Partial-Power-Down Mode  
1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
Y + A • B • C or Y + A ) B ) C  
The SN74LVC1G11 performs the Boolean function  
in positive logic.  
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
Reel of 3000 SN74LVC1G11YZPR  
_ _ _C3_  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
Reel of 3000 SN74LVC1G11DBVR  
Reel of 3000 SN74LVC1G11DCKR  
C11_  
C3_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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