5秒后页面跳转
SN74LVC08AQPWRQ1 PDF预览

SN74LVC08AQPWRQ1

更新时间: 2024-11-24 05:17:03
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
8页 199K
描述
QUADRUPLE 2-INPUT POSITIVE-AND GATE

SN74LVC08AQPWRQ1 数据手册

 浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第2页浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第3页浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第4页浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第5页浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第6页浏览型号SN74LVC08AQPWRQ1的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌ  
ꢋ ꢍꢉꢎꢏ ꢍꢐꢄ ꢑ ꢒ ꢊꢓꢁ ꢐꢍꢔ ꢐꢕ ꢀꢓ ꢔ ꢓꢅꢑ ꢊꢉꢁ ꢎ ꢖ ꢉꢔꢑ  
SCES480B − AUGUST 2003 − REVISED MAY 2004  
D
Qualification in Accordance With  
AEC-Q100  
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC A  
D
Qualified for Automotive Applications  
D
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
D OR PW PACKAGE  
(TOP VIEW)  
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
1Y  
2A  
2B  
2Y  
V
CC  
4B  
4A  
4Y  
3B  
3A  
3Y  
D
D
D
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max t of 4.1 ns at 3.3 V  
pd  
Contact factory for details. Q100 qualification data available on  
request.  
8
GND  
description/ordering information  
The SN74LVC08A-Q1 quadruple 2-input positive-AND gate is designed for 2.7-V to 3.6-V V  
operation.  
CC  
Y + A B or Y + A ) B  
The device performs the Boolean function  
in positive logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Reel of 2500  
Reel of 2000  
SN74LVC08AQDRQ1  
SN74LVC08AQPWRQ1  
LVC08AQ  
LVC08AQ  
−40°C to 125°C  
TSSOP − PW  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
H
L
L
X
logic diagram, each gate (positive logic)  
A
B
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢐꢛ ꢚ ꢦꢡꢠ ꢞ ꢟ ꢠ ꢚꢘ ꢙꢚ ꢛ ꢜ ꢞ ꢚ ꢟ ꢣꢢ ꢠ ꢗꢙ ꢗꢠꢝ ꢞꢗ ꢚꢘꢟ ꢣꢢ ꢛ ꢞꢨ ꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢔꢢꢩ ꢝꢟ ꢓꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ  
ꢟ ꢞ ꢝ ꢘꢦ ꢝ ꢛꢦ ꢪ ꢝ ꢛꢛ ꢝ ꢘ ꢞꢫꢧ ꢐꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚꢘ ꢣꢛ ꢚꢠ ꢢꢟ ꢟꢗ ꢘꢬ ꢦꢚꢢ ꢟ ꢘꢚꢞ ꢘꢢ ꢠꢢ ꢟꢟ ꢝꢛ ꢗꢥ ꢫ ꢗꢘꢠ ꢥꢡꢦ ꢢ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC08AQPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC08AQDREP TI

完全替代

增强型产品 4 通道、2 输入、2V 至 3.6V 与门 | D | 14 | -40 t
SN74LVC08AQPWRG4Q1 TI

完全替代

汽车类 4 通道、2 输入、2V 至 3.6V 与门 | PW | 14 | -40 to
SN74LVC08AMPWREP TI

类似代替

暂无描述

与SN74LVC08AQPWRQ1相关器件

型号 品牌 获取价格 描述 数据表
SN74LVC08ARGYR TI

获取价格

QUADRUPLE 2-INPUT POSITIVE-AND GATES
SN74LVC08ARGYRG4 TI

获取价格

QUADRUPLE 2-INPUT POSITIVE-AND GATES
SN74LVC08PW TI

获取价格

8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUT
SN74LVC10A TI

获取价格

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC10AD TI

获取价格

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC10ADB TI

获取价格

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC10ADBLE TI

获取价格

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC10ADBR TI

获取价格

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC10ADE4 TI

获取价格

LVC/LCX/Z SERIES, TRIPLE 3-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14
SN74LVC10ADG4 TI

获取价格

3 通道、3 输入、1.65V 至 3.6V 与非门 | D | 14 | -40 to