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SN74LVC10APW PDF预览

SN74LVC10APW

更新时间: 2024-11-03 23:06:23
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件PC
页数 文件大小 规格书
8页 122K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATE

SN74LVC10APW 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-14针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:0.85
Samacsys Confidence:Samacsys Status:Released
Samacsys PartID:607034Samacsys Pin Count:14
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Other
Samacsys Footprint Name:SOP65P640X120-14NSamacsys Released Date:2017-01-12 12:59:53
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.024 A
湿度敏感等级:1功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TUBE
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.04 mAProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):12.1 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74LVC10APW 数据手册

 浏览型号SN74LVC10APW的Datasheet PDF文件第2页浏览型号SN74LVC10APW的Datasheet PDF文件第3页浏览型号SN74LVC10APW的Datasheet PDF文件第4页浏览型号SN74LVC10APW的Datasheet PDF文件第5页浏览型号SN74LVC10APW的Datasheet PDF文件第6页浏览型号SN74LVC10APW的Datasheet PDF文件第7页 
SN74LVC10A  
TRIPLE 3-INPUT POSITIVE-NAND GATE  
SCAS284G – JANUARY 1993 – REVISED OCTOBER 1998  
D, DB, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1A  
1B  
2A  
2B  
2C  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
1C  
1Y  
3C  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
10 3B  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
2Y  
GND  
3A  
3Y  
9
8
= 3.3 V, T = 25°C  
CC  
A
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Inputs Accept Voltages to 5.5 V  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages  
description  
This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVC10A performs the Boolean function Y = A B C or Y = A + B + C in positive logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The SN74LVC10A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
L
H
H
H
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC10APW 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC10APWR TI

完全替代

TRIPLE 3-INPUT POSITIVE-NAND GATE
SN74LVC08ADR TI

类似代替

QUADRUPLE 2-INPUT POSITIVE-AND GATES
SN74LVC08AD TI

类似代替

QUADRUPLE 2-INPUT POSITIVE-AND GATES

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