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SN74LVC10ADBLE PDF预览

SN74LVC10ADBLE

更新时间: 2024-11-20 05:17:03
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
12页 342K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATE

SN74LVC10ADBLE 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP14,.3针数:14
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.18系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14长度:6.2 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
Prop。Delay @ Nom-Sup:4.9 ns传播延迟(tpd):12.1 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN74LVC10ADBLE 数据手册

 浏览型号SN74LVC10ADBLE的Datasheet PDF文件第2页浏览型号SN74LVC10ADBLE的Datasheet PDF文件第3页浏览型号SN74LVC10ADBLE的Datasheet PDF文件第4页浏览型号SN74LVC10ADBLE的Datasheet PDF文件第5页浏览型号SN74LVC10ADBLE的Datasheet PDF文件第6页浏览型号SN74LVC10ADBLE的Datasheet PDF文件第7页 
SN74LVC10A  
TRIPLE 3-INPUT POSITIVE-NAND GATE  
www.ti.com  
SCAS284NJANUARY 1993REVISED FEBRUARY 2005  
FEATURES  
D, DB, NS, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Specified From –40°C to 85°C and  
– 40°C to 125°C  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
1A  
1B  
V
CC  
1C  
1Y  
3C  
3B  
3A  
3Y  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.9 ns at 3.3 V  
2A  
2B  
2C  
2Y  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
8
GND  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
RGY PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
1
14  
13  
12  
11  
10  
9
1B  
1C  
1Y  
3C  
3B  
3A  
2
3
4
5
6
2A  
2B  
2C  
2Y  
7
8
DESCRIPTION/ORDERING INFORMATION  
This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC10A performs the Boolean function Y = A B C or Y = A + B + C in positive logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
TA  
PACKAGE(1)  
–40°C to 85°C  
QFN - RGY  
SOIC - D  
Reel of 1000  
SN74LVC10ARGYR  
LC10A  
Tube of 50  
SN74LVC10AD  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LVC10ADR  
SN74LVC10ADT  
SN74LVC10ANSR  
SN74LVC10ADBR  
SN74LVC10APW  
SN74LVC10APWR  
SN74LVC10APWT  
LVC10A  
SOP - NS  
LVC10A  
LC10A  
–40°C to 125°C  
SSOP - DB  
TSSOP - PW  
Reel of 2000  
Reel of 250  
LC10A  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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