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SN74AVC16646DGVR PDF预览

SN74AVC16646DGVR

更新时间： 2024-11-15 22:59:15
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
18页 219K
描述
16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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SN74AVC16646DGVR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：TSSOP, TSSOP56,.25,16针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：1.57Is Samacsys：N
其他特性：WITH DIRECTION CONTROL控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：AVC
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：11.3 mm负载电容（CL）：30 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.012 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.25,16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：2.6 ns传播延迟（tpd）：7.4 ns
认证状态：Not Qualified施密特触发器：No
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.2 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：4.4 mmBase Number Matches：1

SN74AVC16646DGVR 数据手册

 浏览型号SN74AVC16646DGVR的Datasheet PDF文件第2页浏览型号SN74AVC16646DGVR的Datasheet PDF文件第3页浏览型号SN74AVC16646DGVR的Datasheet PDF文件第4页浏览型号SN74AVC16646DGVR的Datasheet PDF文件第5页浏览型号SN74AVC16646DGVR的Datasheet PDF文件第6页浏览型号SN74AVC16646DGVR的Datasheet PDF文件第7页 
SN74AVC16646  
16-BIT BUS TRANSCEIVER AND REGISTER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES181F–DECEMBER 1998–REVISED JUNE 2005  
FEATURES  
•
•
•
•
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
•
•
•
Member of the Texas Instruments Widebus™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DOC™ (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without Speed  
Degradation  
Package Options Include Plastic Thin Shrink  
Small-Outline (DGG) and Thin Very  
Small-Outline (DGV) Packages  
•
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With IOH and IOL of ±24 mA  
at 2.5-V VCC  
DESCRIPTION  
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows  
typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At  
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a  
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family  
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry  
Technology and Applications, literature number SCEA009.  
3.2  
T
A
= 25°C  
T
A
= 25°C  
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
CC  
= 3.3 V  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
V
CC  
= 3.3 V  
V
CC  
= 2.5 V  
V
CC  
= 1.8 V  
0
17  
34  
51  
68  
85 102 119 136 153 170  
-160 -144 -128 -112 -96 -80 -64 -48 -32 -16  
- Output Current - mA  
0
I
- Output Current - mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 16-bit bus transceiver and register is operational at 1.2-V to 3.6-V VCC, but is designed specifically for  
1.65-V to 3.6-V VCC operation.  
The SN74AVC16646 can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is  
clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 2  
illustrates the four fundamental bus-management functions that can be performed with the SN74AVC16646.  
Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the  
transceiver mode, data present at the high-impedance port may be stored in either register or in both. The  
select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC, DOC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
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SN74AVC16646DGVR 替代型号

型号 品牌 替代类型 描述 数据表
SN74AVC16646DGGR TI

完全替代

 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
74AVC16646DGGRE4 TI

完全替代

 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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 		22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
SN74AVC16722DGG TI

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 		22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
SN74AVC16722DGGR TI

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 		22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
SN74AVC16827 TI

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 		20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74AVC16827DGGR TI

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 		具有三态输出的 20 通道、1.2V 至 3.6V 缓冲器 | DGG | 56 | -4
SN74AVC16827DGV TI

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 		AVC SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56
SN74AVC16827DGVR TI

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 		20-Bit Buffer/Driver With 3-State Outputs 56-TVSOP -40 to 85
SN74AVC16834 TI

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 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74AVC16834DGG TI

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 		18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74AVC16834DGGR TI

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 		18-Bit Universal Bus Driver With 3-State Outputs 56-TSSOP -40 to 85

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