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SN74AVC16722 PDF预览

SN74AVC16722

更新时间: 2024-11-15 21:54:55
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
12页 201K
描述
22-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

SN74AVC16722 数据手册

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SN74AVC16722  
22-BIT FLIP-FLOP  
WITH 3-STATE OUTPUTS  
SCES166H – DECEMBER 1998 – REVISED JUNE 2000  
Member of the Texas Instruments  
Widebus Family  
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
I
Supports Partial-Power-Down Mode  
off  
Operation  
DOC (Dynamic Output Control) Circuit  
Dynamically Changes Output Impedance,  
Resulting in Noise Reduction Without  
Speed Degradation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class I  
Packaged in Thin Shrink Small-Outline  
Package  
Dynamic Drive Capability Is Equivalent to  
Standard Outputs With I  
and I  
of  
OH  
OL  
±24 mA at 2.5-V V  
CC  
description  
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output  
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1  
shows typical V vs I and V  
vs I  
curves to illustrate the output impedance and drive capability of the  
OL  
OL  
OH  
OH  
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is  
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC  
Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC )  
Circuitry Technology and Applications, literature number SCEA009.  
3.2  
T
= 25°C  
T
= 25°C  
A
A
Process = Nominal  
Process = Nominal  
2.8  
2.4  
2.0  
2.8  
2.4  
2.0  
V
= 3.3 V  
CC  
1.6  
1.2  
0.8  
0.4  
1.6  
1.2  
0.8  
0.4  
V
= 2.5 V  
CC  
V
= 1.8 V  
CC  
V
= 3.3 V  
V
= 2.5 V  
CC  
CC  
V
= 1.8 V  
CC  
–160 –144 –128 –112 –96 –80 –64 –48 –32 –16  
– Output Current – mA  
0
17  
34  
51  
68  
85 102 119 136 153 170  
0
I
– Output Current – mA  
I
OH  
OL  
Figure 1. Output Voltage vs Output Current  
This 22-bit flip-flop is operational at 1.2-V to 3.6-V V , but is designed specifically for 1.65-V to 3.6-V V  
CC  
operation.  
CC  
The 22 flip-flops of the SN74AVC16722 are edge-triggered D-type flip-flops with clock-enable (CLKEN) input.  
On the positive transition of the clock (CLK) input, the device stores data into the flip-flops if CLKEN is low. If  
CLKEN is high, no data is stored.  
A buffered output-enable (OE) input places the 22 outputs in either a normal logic state (high or low) or the  
high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.  
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DOC, EPIC, and Widebus are trademarks of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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