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SN74AUC2G04 PDF预览

SN74AUC2G04

更新时间: 2024-11-01 22:49:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
11页 272K
描述
DUAL INVERTER GATE

SN74AUC2G04 数据手册

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SN74AUC2G04  
DUAL INVERTER GATE  
SCES437A – APRIL 2003 – REVISED JUNE 2003  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Available in the Texas Instruments  
NanoStarand NanoFreePackages  
Optimized for 1.8-V Operation and Is 3.6-V  
I/O Tolerant to Support Mixed-Mode Signal  
Operation  
1
2
3
6
5
4
1A  
GND  
2A  
1Y  
V
CC  
2Y  
I
Supports Partial-Power-Down Mode  
off  
Operation  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
Sub 1-V Operable  
Max t of 1.7 ns at 1.8 V  
pd  
Low Power Consumption, 10 µA at 1.8 V  
3 4  
2 5  
1 6  
2A  
GND  
1A  
2Y  
V
CC  
8-mA Output Drive at 1.8 V  
1Y  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
This dual inverter is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V to 1.95-V V  
CC  
operation.  
CC  
The SN74AUC2G04 performs the Boolean function Y = A.  
NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
NanoStar– WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
Tape and reel SN74AUC2G04YEPR  
_ _ _UC_  
NanoFree– WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
Tape and reel SN74AUC2G04YZPR  
–40°C to 85°C  
SOT (SOT-23) – DBV  
Tape and reel SN74AUC2G04DBVR  
Tape and reel SN74AUC2G04DCKR  
U04_  
UC_  
SOT (SC-70) – DCK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one  
following character to designate the assembly/test site.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar and NanoFree are trademarks of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AUC2G04 替代型号

型号 品牌 替代类型 描述 数据表
SN74AUP2G04 TI

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