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SN74ALVCH162525DGGR PDF预览

SN74ALVCH162525DGGR

更新时间： 2024-11-21 20:03:23
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
16页 338K
描述
18-Bit Registered Transceiver With 3-State Outputs 56-TSSOP -40 to 85

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SN74ALVCH162525DGGR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP56,.3,20针数：56
Reach Compliance Code：not_compliant风险等级：5.5
其他特性：WITH CLOCK ENABLE FOR EACH REGISTER; IN B TO A PATH FOUR STAGE PIPELINE IS PROVIDED控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.024 A位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 VProp。Delay @ Nom-Sup：4.7 ns
传播延迟（tpd）：5.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：6.1 mmBase Number Matches：1

SN74ALVCH162525DGGR 数据手册

 浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第2页浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第3页浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第4页浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第5页浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第6页浏览型号SN74ALVCH162525DGGR的Datasheet PDF文件第7页 
SN74ALVCH162525  
18-BIT REGISTERED BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES058H–NOVEMBER 1995–REVISED SEPTEMBER 2004  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
•
•
•
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
CLKENAB  
OEAB  
A1  
SEL  
CLKAB  
B1  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
2
3
B-Port Outputs Have Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
4
GND  
A2  
GND  
B2  
5
6
A3  
B3  
•
ESD Protection Exceeds 2000 V Per  
7
V
CC  
V
CC  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
8
A4  
A5  
B4  
B5  
9
•
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
A6  
GND  
A7  
B6  
GND  
B7  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
A8  
B8  
Package Option Includes Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
A9  
B9  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
B10  
B11  
B12  
GND  
B13  
B14  
B15  
NOTE: For tape-and-reel order entry, the DGGR package is  
abbreviated to GR.  
DESCRIPTION  
This 18-bit universal bus transceiver is designed for  
1.65-V to 3.6-V VCC operation.  
V
CC  
V
CC  
A16  
A17  
B16  
B17  
Data flow in each direction is controlled by  
output-enable (OEAB and OEBA) and clock-enable  
(CLKENAB and CLKENBA) inputs. For the A-to-B  
data flow, the data flows through a single register.  
The B-to-A data can flow through a four-stage  
pipeline register path, or through a single register  
path, depending on the state of the select (SEL)  
input.  
GND  
A18  
OEBA  
CLKENBA  
GND  
B18  
CLK1BA  
CLK2BA  
Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input, provided that the  
appropriate CLKEN inputs are low. The A-to-B data transfer is synchronized to the CLKAB input, and B-to-A data  
transfer is synchronized with the CLK1BA and CLK2BA inputs.  
The B outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot  
and undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162525 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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