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SN74ALVC7814DL PDF预览

SN74ALVC7814DL

更新时间： 2024-11-24 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 存储光电二极管先进先出芯片
页数 文件大小 规格书
11页 150K
描述
64 】 18 LOW-POWER FIRST-IN, FIRST-OUT MEMORY

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中文翻译

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SN74ALVC7814DL 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.71
风险等级：5.68Is Samacsys：N
最长访问时间：20 ns周期时间：25 ns
JESD-30 代码：R-PDSO-G56长度：18.415 mm
内存密度：1152 bit内存宽度：18
功能数量：1端子数量：56
字数：64 words字数代码：64
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：64X18
可输出：YES封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH并行/串行：PARALLEL
认证状态：Not Qualified座面最大高度：2.79 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

SN74ALVC7814DL 数据手册

 浏览型号SN74ALVC7814DL的Datasheet PDF文件第2页浏览型号SN74ALVC7814DL的Datasheet PDF文件第3页浏览型号SN74ALVC7814DL的Datasheet PDF文件第4页浏览型号SN74ALVC7814DL的Datasheet PDF文件第5页浏览型号SN74ALVC7814DL的Datasheet PDF文件第6页浏览型号SN74ALVC7814DL的Datasheet PDF文件第7页 
SN74ALVC7814  
64 × 18  
LOW-POWER FIRST-IN, FIRST-OUT MEMORY  
SCAS592A – OCTOBER 1997 – REVISED APRIL 1998  
DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
Low-Power Advanced CMOS Technology  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
RESET  
D17  
D16  
D15  
D14  
D13  
D12  
D11  
OE  
Operates From 3-V to 3.6-V V  
CC  
Load Clock and Unload Clock Can Be  
Asynchronous or Coincident  
2
Q17  
Q16  
Q15  
GND  
Q14  
3
4
5
Full, Empty, and Half-Full Flags  
6
Programmable Almost-Full/Almost-Empty  
Flag  
7
V
CC  
8
Q13  
Q12  
Q11  
Q10  
Q9  
Fast Access Times of 18 ns With a 50-pF  
Load and All Data Outputs Switching  
Simultaneously  
9
D10  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
V
CC  
D9  
Data Rates up to 40 MHz  
3-State Outputs  
D8  
GND  
D7  
GND  
Q8  
Pin-to-Pin Compatible With SN74ACT7804,  
SN74ACT7806, and SN74ACT7814  
D6  
Q7  
D5  
Q6  
Packaged in Shrink Small-Outline 300-mil  
Package Using 25-mil Center-to-Center  
Spacing  
D4  
Q5  
D3  
V
CC  
D2  
Q4  
D1  
Q3  
description  
D0  
Q2  
A FIFO memory is a storage device that allows  
data to be written into and read from its array at  
independent data rates. The SN74ALVC7814 is  
an 18-bit FIFO with high speed and fast access  
times. Data is processed at rates up to 40 MHz  
with access times of 18 ns in a bit-parallel format.  
These memories are designed for 3-V to 3.6-V  
HF  
GND  
Q1  
PEN  
AF/AE  
LDCK  
NC  
Q0  
UNCK  
NC  
NC  
NC  
FULL  
EMPTY  
V
operation.  
CC  
Data is written into memory on a low-to-high  
transition of the load clock (LDCK) and is read out  
on a low-to-high transition of the unload clock  
(UNCK). The memory is full when the number of  
words clocked in exceeds the number of words  
clocked out by 64. When the memory is full, LDCK  
has no effect on the data residing in memory.  
When the memory is empty, UNCK has no effect.  
NC – No internal connection  
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-  
full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory  
is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output  
is high whenever the FIFO contains 32 or more words and low when it contains 31 or fewer words. The AF/AE  
status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to  
program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN) is low.  
The AF/AE flag is high when the FIFO contains X or fewer words or (64 – Y) or more words. The AF/AE flag  
is low when the FIFO contains between (X + 1) and (63 – Y) words.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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