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SN74ALVCH162268DGG

更新时间： 2024-11-17 22:24:31
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
11页 154K
描述
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

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SN74ALVCH162268DGG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP,
针数：56Reach Compliance Code：compliant
风险等级：5.64其他特性：WITH SYNCHRONOUS OUTPUT ENABLES AND MUX SELECT
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：14 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS EXCHANGER
湿度敏感等级：1位数：12
功能数量：1端口数量：3
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：6.1 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：6.1 mmBase Number Matches：1

SN74ALVCH162268DGG 数据手册

 浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第2页浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第3页浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第4页浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第5页浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第6页浏览型号SN74ALVCH162268DGG的Datasheet PDF文件第7页 
SN74ALVCH162268  
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER  
WITH 3-STATE OUTPUTS  
SCES018G – AUGUST 1995 – REVISED JUNE 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
OEA  
CLKEN1B  
2B3  
OEB  
CLKENA2  
2B4  
GND  
2B5  
2B6  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
B-Port Outputs Have Equivalent 26-Ω  
Series Resistors, So No External Resistors  
Are Required  
3
GND  
2B2  
2B1  
4
5
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
6
V
V
7
CC  
CC  
A1  
A2  
A3  
GND  
A4  
A5  
A6  
A7  
A8  
2B7  
2B8  
2B9  
8
9
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
GND  
2B10  
2B11  
2B12  
1B12  
1B11  
1B10  
GND  
1B9  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
NOTE: For tape and reel order entry:  
A9  
GND  
A10  
A11  
A12  
The DGGR package is abbreviated to GR.  
description  
1B8  
1B7  
This 12-bit to 24-bit registered bus exchanger is  
V
V
CC  
CC  
designed for 1.65-V to 3.6-V V  
operation.  
CC  
1B1  
1B2  
GND  
1B6  
1B5  
GND  
1B4  
CLKENA1  
CLK  
The SN74ALVCH162268 is used for applications  
in which data must be transferred from a narrow  
high-speed bus to a wide, lower-frequency bus.  
1B3  
CLKEN2B  
SEL  
The device provides synchronous data exchange  
between the two ports. Data is stored in the  
internal registers on the low-to-high transition of  
the clock (CLK) input when the appropriate  
clock-enable (CLKEN) inputs are low. The select  
(SEL) line is synchronous with CLK and selects  
1B or 2B input data for the A outputs.  
For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single  
storage register in the A-to-2B path. Proper control of these inputs allows two sequential 12-bit words to be  
presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables  
(OEA, OEB). These control terminals are registered, so bus direction changes are synchronous with CLK.  
The B outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot  
and undershoot.  
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon  
as possible and OE should be tied to V  
through a pullup resistor; the minimum value of the resistor is  
CC  
determined by the current-sinking capability of the driver. Due to OE being routed through a register, the active  
state of the outputs cannot be determined prior to the arrival of the first clock pulse.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74ALVCH162268DGG 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALVCH162268DGGR TI

功能相似

 12-Bit To 24-Bit Registered Bus Exchanger With 3-State Outputs 56-TSSOP -40 to 85
SN74ALVCH162268GR TI

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 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

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SN74ALVCH162334DGG TI

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 		16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162334DGGR TI

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