Datasheet > SN74AHC595-Q1

SN74AHC595-Q1

更新时间： 2024-09-15 12:22:47

品牌	Logo	应用领域
德州仪器 - TI		移位寄存器输出元件
页数	文件大小	规格书
11页	210K
描述
8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS

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SN74AHC595-Q1 数据手册

SN74AHC595-Q1

8-BIT SHIFT REGISTER

WITH 3-STATE OUTPUT REGISTERS

www.ti.com

SCLS537B–AUGUST 2003–REVISED JANUARY 2008

FEATURES

PW PACKAGE

(TOP VIEW)

•

Qualified for Automotive Applications

Operating Range 2-V to 5.5-V V_CC

8-Bit Serial-In, Parallel-Out Shift

Shift Register Has Direct Clear

•

Q_B

Q_C

V_CC

Q_A

Q_D

SER

Q_E

Q_F

12 RCLK

Q_G

SRCLK

SRCLR

Q_H

GND

Q_H

′

DESCRIPTION/ORDERING INFORMATION

The SN74AHC595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register.

The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage

registers. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for

cascading. When the output-enable (OE) input is high, all outputs, except Q_H', are in the high-impedance state.

Both the shift-register clock (SRCLK) and storage-register clock (RCLK) are positive-edge triggered. If both

clocks are connected together, the shift register always is one clock pulse ahead of the storage register.

ORDERING INFORMATION⁽¹⁾

T_A

PACKAGE⁽²⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING

HA595Q

–40°C to 125°C

TSSOP – PW

Reel of 2000

SN74AHC595QPWRQ1

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

FUNCTION TABLE

INPUTS

FUNCTION

SER

SRCLK

SRCLR

RCLK

Outputs Q_A–Q_Hare disabled.

Outputs Q_A–Q_Hare enabled.

Shift register is cleared.

First stage of the shift register goes low.

Other stages store the data of previous stage, respectively.

↑

First stage of the shift register goes high.

Other stages store the data of previous stage, respectively.

↑

Shift-register data is stored into the storage register.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...11

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与SN74AHC595-Q1相关器件

型号	品牌	获取价格	描述	数据表
SN74AHC595QPWRQ1	TI	获取价格	8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS
SN74AHC74	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74D	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DB	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DBG4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DBLE	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DBR	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DBRE4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DBRG4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74DE4	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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