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SN74AHC74DR PDF预览

SN74AHC74DR

更新时间： 2024-11-17 23:06:15
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管PC
页数 文件大小 规格书
19页 653K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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中文翻译

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SN74AHC74DR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOIC-14针数：14
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.81Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：327949
Samacsys Pin Count：14Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：SOIC127P600X175-14N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
系列：AHC/VHC/H/U/VJESD-30 代码：R-PDSO-G14
JESD-609代码：e4长度：8.65 mm
负载电容（CL）：50 pF逻辑集成电路类型：D FLIP-FLOP
最大频率@ Nom-Sup：75000000 Hz最大I（ol）：0.008 A
湿度敏感等级：1位数：1
功能数量：2端子数量：14
最高工作温度：125 °C最低工作温度：-40 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP14,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TR峰值回流温度（摄氏度）：260
电源：2/5.5 V最大电源电流（ICC）：0.02 mA
Prop。Delay @ Nom-Sup：10.5 ns传播延迟（tpd）：17.5 ns
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：FF/Latch最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：AUTOMOTIVE端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：3.9 mm
最小 fmax：110 MHzBase Number Matches：1

SN74AHC74DR 数据手册

 浏览型号SN74AHC74DR的Datasheet PDF文件第2页浏览型号SN74AHC74DR的Datasheet PDF文件第3页浏览型号SN74AHC74DR的Datasheet PDF文件第4页浏览型号SN74AHC74DR的Datasheet PDF文件第5页浏览型号SN74AHC74DR的Datasheet PDF文件第6页浏览型号SN74AHC74DR的Datasheet PDF文件第7页 
SN54AHC74, SN74AHC74  
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH CLEAR AND PRESET  
SCLS255J – DECEMBER 1995 – REVISED JULY 2003  
Operating Range 2-V to 5.5-V V  
ESD Protection Exceeds JESD 22  
CC  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
SN74AHC74 . . . RGY PACKAGE  
(TOP VIEW)  
SN54AHC74 . . . J OR W PACKAGE  
SN74AHC74 . . . D, DB, DGV, N, NS,  
OR PW PACKAGE  
SN54AHC74 . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
14  
1CLR  
1D  
V
CC  
13 2CLR  
1
2
3
4
5
6
7
14  
3
2
1
20 19  
18  
1D  
1CLK  
1PRE  
1Q  
13 2CLR  
12 2D  
2
3
4
5
6
2D  
1CLK  
NC  
4
5
6
7
8
12  
11  
10  
9
1CLK  
1PRE  
1Q  
2D  
NC  
17  
16  
11  
10  
9
2CLK  
2PRE  
2Q  
2CLK  
2PRE  
2Q  
2CLK  
1PRE  
NC  
15 NC  
14  
9 10 11 12 13  
1Q  
1Q  
2PRE  
1Q  
7
8
8
GND  
2Q  
NC – No internal connection  
description/ordering information  
The ’AHC74 dual positive-edge-triggered devices are D-type flip-flops.  
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,  
data at the D input can be changed without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
QFN – RGY  
PDIP – N  
Tape and reel  
Tube  
SN74AHC74RGYR  
SN74AHC74N  
HA74  
SN74AHC74N  
Tube  
SN74AHC74D  
SOIC – D  
AHC74  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SN74AHC74DR  
SN74AHC74NSR  
SN74AHC74DBR  
SN74AHC74PW  
SN74AHC74PWR  
SN74AHC74DGVR  
SNJ54AHC74J  
–40°C to 85°C  
SOP – NS  
AHC74  
HA74  
SSOP – DB  
TSSOP – PW  
HA74  
Tape and reel  
Tape and reel  
Tube  
TVSOP – DGV  
CDIP – J  
HA74  
SNJ54AHC74J  
SNJ54AHC74W  
SNJ54AHC74FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHC74W  
SNJ54AHC74FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...19

中文翻译

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SN74AHC74DR 替代型号

型号 品牌 替代类型 描述 数据表
SN74AHC74DBLE TI

完全替代

 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74D TI

完全替代

 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74RGYR TI

完全替代

 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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SN74AHC74DRG4 TI

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SN74AHC74-EP TI

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SN74AHC74MDREP TI

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SN74AHC74MPWREP TI

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SN74AHC74N TI

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 		DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74NE4 TI

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 		DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74NSR TI

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 		DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74NSRE4 TI

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 		DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74PW TI

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 		DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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