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SN74AHC74QPWRQ1 PDF预览

SN74AHC74QPWRQ1

更新时间: 2024-11-19 11:06:23
品牌 Logo 应用领域
德州仪器 - TI PC光电二极管逻辑集成电路触发器锁存器
页数 文件大小 规格书
11页 263K
描述
具有清零和预设功能的汽车类双路上升沿 D 类触发器 | PW | 14 | -40 to 125

SN74AHC74QPWRQ1 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.65Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:181820
Samacsys Pin Count:14Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:PW (R-PDSO-G14)
Samacsys Released Date:2015-04-13 16:56:23Is Samacsys:N
系列:AHC/VHC/H/U/VJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:75000000 Hz最大I(ol):0.008 A
湿度敏感等级:3位数:1
功能数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:2/5.5 V最大电源电流(ICC):0.02 mA
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):17.5 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:110 MHz
Base Number Matches:1

SN74AHC74QPWRQ1 数据手册

 浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第2页浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第3页浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第4页浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第5页浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第6页浏览型号SN74AHC74QPWRQ1的Datasheet PDF文件第7页 
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ꢗ ꢏꢐ ꢅ ꢆꢌ ꢒꢄꢔ ꢄꢁꢊ ꢍ ꢔꢒ ꢀ ꢒꢐ  
SGDS020A − FEBRUARY 2002 − REVISED APRIL 2008  
D OR PW PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
EPIC(Enhanced-Performance Implanted  
CMOS) Process  
1CLR  
1D  
V
CC  
2CLR  
2D  
1
2
3
4
5
6
7
14  
13  
12  
11  
D
Operating Range 2-V to 5.5-V V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
D
1CLK  
1PRE  
1Q  
2CLK  
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
10 2PRE  
9
8
1Q  
2Q  
2Q  
GND  
description  
The SN74AHC74Q dual positive-edge-triggered device is a D-type flip-flop.  
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,  
data at the D input can be changed without affecting the levels at the outputs.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Tape and reel  
Tape and reel  
SN74AHC74QDRQ1  
AHC74Q  
−40°C to 125°C  
TSSOP − PW  
SN74AHC74QPWRQ1 HA74Q  
For the most current package and ordering information, see the Package Option Addendum at the end of  
this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments.  
ꢐꢣ  
Copyright 2008, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AHC74QPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74AHC74PWR TI

类似代替

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN74AHC74PW TI

类似代替

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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