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SN74ABT18502APM PDF预览

SN74ABT18502APM

更新时间: 2024-11-11 20:06:39
品牌 Logo 应用领域
德州仪器 - TI 输入元件信息通信管理输出元件逻辑集成电路触发器
页数 文件大小 规格书
33页 960K
描述
ABT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64

SN74ABT18502APM 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:LFQFP, QFP64,.47SQ,20Reach Compliance Code:compliant
风险等级:5.52其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; BUS HOLD INPUTS
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ABTJESD-30 代码:S-PQFP-G64
长度:10 mm负载电容(CL):50 pF
逻辑集成电路类型:BOUNDARY SCAN REG BUS TRANSCEIVER最大I(ol):0.064 A
位数:9功能数量:2
端口数量:2端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):22 mA
Prop。Delay @ Nom-Sup:6 ns传播延迟(tpd):6 ns
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:10 mm
Base Number Matches:1

SN74ABT18502APM 数据手册

 浏览型号SN74ABT18502APM的Datasheet PDF文件第2页浏览型号SN74ABT18502APM的Datasheet PDF文件第3页浏览型号SN74ABT18502APM的Datasheet PDF文件第4页浏览型号SN74ABT18502APM的Datasheet PDF文件第5页浏览型号SN74ABT18502APM的Datasheet PDF文件第6页浏览型号SN74ABT18502APM的Datasheet PDF文件第7页 
SN74ABT18502  
SCAN TEST DEVICE  
WITH 18-BIT REGISTERED BUS TRANSCEIVER  
SCBS753 – FEBRUARY 2002  
Member of the Texas Instruments  
Widebus Family  
SCOPE Instruction Set  
– IEEE Std 1149.1-1990 Required  
Instructions, Optional INTEST, and  
P1149.1A CLAMP and HIGHZ  
– Parallel Signature Analysis (PSA) at  
Inputs With Masking Option  
– Pseudorandom Pattern Generation  
(PRPG) From Outputs  
– Sample Inputs/Toggle Outputs (TOPSIP)  
– Binary Count From Outputs  
– Device Identification  
UBT Transceiver Combines D-Type  
Latches and D-Type Flip-Flops for  
Operation in Transparent, Latched, or  
Clocked Mode  
Compatible With IEEE Std 1149.1-1990  
(JTAG) Test Access Port (TAP) and  
Boundary-Scan Architecture  
Includes D-Type Flip-Flops and Control  
Circuitry to Provide Multiplexed  
Transmission of Stored and Real-Time Data  
– Even-Parity Opcodes  
Two Boundary-Scan Cells (BSCs) Per I/O  
for Greater Flexibility  
PM PACKAGE  
(TOP VIEW)  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
1A9  
1B4  
1B5  
1B6  
GND  
1B7  
1B8  
1B9  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
2
3
4
5
6
7
8
V
CC  
9
V
2B1  
2B2  
2B3  
2B4  
GND  
2B5  
2B6  
2B7  
CC  
10  
11  
12  
13  
14  
15  
16  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SCOPE, UBT, and Widebus are trademarks of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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