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SN74ABT18504PMG4 PDF预览

SN74ABT18504PMG4

更新时间: 2024-11-11 03:59:11
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路测试输出元件信息通信管理
页数 文件大小 规格书
34页 666K
描述
SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS

SN74ABT18504PMG4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:GREEN, PLASTIC, LQFP-64
针数:64Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.66
Is Samacsys:N其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH CLOCK ENABLE
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:ABTJESD-30 代码:S-PQFP-G64
JESD-609代码:e4长度:10 mm
逻辑集成电路类型:BOUNDARY SCAN REG BUS TRANSCEIVER最大I(ol):0.064 A
湿度敏感等级:3位数:20
功能数量:1端口数量:2
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
包装方法:TRAY峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):40 mA
Prop。Delay @ Nom-Sup:6.5 ns传播延迟(tpd):6.8 ns
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:10 mm
Base Number Matches:1

SN74ABT18504PMG4 数据手册

 浏览型号SN74ABT18504PMG4的Datasheet PDF文件第2页浏览型号SN74ABT18504PMG4的Datasheet PDF文件第3页浏览型号SN74ABT18504PMG4的Datasheet PDF文件第4页浏览型号SN74ABT18504PMG4的Datasheet PDF文件第5页浏览型号SN74ABT18504PMG4的Datasheet PDF文件第6页浏览型号SN74ABT18504PMG4的Datasheet PDF文件第7页 
SN54ABT18504, SN74ABT18504  
SCAN TEST DEVICES WITH  
20-BIT UNIVERSAL BUS TRANSCEIVERS  
SCBS108B – AUGUST 1992 – REVISED JUNE 1993  
Members of the Texas Instruments  
SCOPE Instruction Set  
– IEEE Standard 1149.1-1990 Required  
Instructions, Optional INTEST, and  
P1149.1A CLAMP and HIGHZ  
– Parallel Signature Analysis at Inputs With  
Masking Option  
SCOPE Family of Testability Products  
Members of the Texas Instruments  
Widebus Family  
Compatible With the IEEE Standard  
1149.1-1990 (JTAG) Test Access Port and  
Boundary-Scan Architecture  
– Pseudo-Random Pattern Generation  
From Outputs  
UBT (Universal Bus Transceiver)  
Combines D-Type Latches and D-Type  
Flip-Flops for Operation in Transparent,  
Latched, or Clocked Mode  
– Sample Inputs/Toggle Outputs  
– Binary Count From Outputs  
– Device Identification  
– Even-Parity Opcodes  
Two Boundary-Scan Cells per I/O for  
Packaged in 64-Pin Plastic Thin Quad Flat  
Pack Using 0.5-mm Center-to-Center  
Spacings and 68-Pin Ceramic Quad Flat  
Pack Using 25-mil Center-to-Center  
Spacings  
Greater Flexibility  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
SN54ABT18504 . . . HV PACKAGE  
(TOP VIEW)  
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A4  
A5  
A6  
GND  
A7  
A8  
A9  
A10  
NC  
B5  
B6  
B7  
GND  
B8  
B9  
B10  
V
CC  
NC  
V
B11  
B12  
B13  
B14  
GND  
B15  
B16  
B17  
CC  
A11  
A12  
A13  
GND  
A14  
A15  
A16  
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NC – No internal connection  
SCOPE, Widebus, UBT, and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1993, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ABT18504PMG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ABT18504PMRG4 TI

完全替代

SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
SN74ABT18504PMR TI

完全替代

SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
SN74ABT18504PM TI

完全替代

SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS

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