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SN74ABT18640DLRG4 PDF预览

SN74ABT18640DLRG4

更新时间： 2024-11-11 15:52:03
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
30页 459K
描述
ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56

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中文翻译

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SN74ABT18640DLRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP56,.4针数：56
Reach Compliance Code：compliant风险等级：5.67
其他特性：SCANNABLE控制类型：COMMON CONTROL
计数方向：BIDIRECTIONAL系列：ABT
JESD-30 代码：R-PDSO-G56长度：18.415 mm
逻辑集成电路类型：BOUNDARY SCAN BUS TRANSCEIVER最大I（ol）：0.064 A
位数：9功能数量：2
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP56,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
Prop。Delay @ Nom-Sup：5.4 ns传播延迟（tpd）：5.4 ns
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：7.49 mmBase Number Matches：1

SN74ABT18640DLRG4 数据手册

 浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第2页浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第3页浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第4页浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第5页浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第6页浏览型号SN74ABT18640DLRG4的Datasheet PDF文件第7页 
SN54ABT18640, SN74ABT18640  
SCAN TEST DEVICES  
WITH 18-BIT INVERTING BUS TRANSCEIVERS  
SCBS267C – FEBRUARY 1994 – REVISED JULY 1996  
SN54ABT18640 . . . WD PACKAGE  
SN74ABT18640 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
SCOPE Family of Testability Products  
Members of the Texas Instruments  
Widebus Family  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1
56 1OE  
Compatible With the IEEE Standard  
1149.1-1990 (JTAG) Test Access Port and  
Boundary-Scan Architecture  
2
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1A1  
1A2  
GND  
1A3  
1A4  
3
4
SCOPE Instruction Set  
5
– IEEE Standard 1149.1-1990 Required  
Instructions and Optional CLAMP and  
HIGHZ  
– Parallel-Signature Analysis at Inputs  
– Pseudo-Random Pattern Generation  
From Outputs  
– Sample Inputs/Toggle Outputs  
– Binary Count From Outputs  
– Device Identification  
6
7
V
V
CC  
CC  
8
1B5  
1B6  
1B7  
GND  
1B8  
1B9  
2B1  
2B2  
2B3  
2B4  
GND  
2B5  
2B6  
2B7  
1A5  
1A6  
1A7  
GND  
1A8  
1A9  
2A1  
2A2  
2A3  
2A4  
GND  
2A5  
2A6  
2A7  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
– Even-Parity Opcodes  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Packaged in Plastic Shrink Small-Outline  
(DL) and Thin Shrink Small-Outline (DGG)  
Packages and 380-mil Fine-Pitch Ceramic  
Flat (WD) Packages  
V
V
CC  
CC  
description  
2B8  
2B9  
GND  
2DIR  
TDO  
TMS  
2A8  
2A9  
GND  
2OE  
TDI  
The ’ABT18640 scan test devices with 18-bit  
inverting bus transceivers are members of the  
Texas  
Instruments  
SCOPE  
testability  
integrated-circuit family. This family of devices  
supports IEEE Standard 1149.1-1990 boundary  
scan to facilitate testing of complex circuit-board  
assemblies. Scan access to the test circuitry is  
accomplished via the 4-wire test access port  
(TAP) interface.  
TCK  
In the normal mode, these devices are 18-bit inverting bus transceivers. They can be used either as two 9-bit  
transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples  
of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP  
in the normal mode does not affect the functional operation of the SCOPE bus transceivers.  
Data flow is controlled by the direction-control (DIR) and output-enable (OE) inputs. Data transmission is  
allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. OE can  
be used to disable the device so that the buses are effectively isolated.  
In the test mode, the normal operation of the SCOPE bus transceivers is inhibited and the test circuitry is  
enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform  
boundary-scan test operations according to the protocol described in IEEE Standard 1149.1-1990.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SCOPE, Widebus, and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...30

中文翻译

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SN74ABT18640DLRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ABT18640DLR TI

类似代替

 ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56, GREEN, PLASTIC,
SN74ABT18640DL TI

类似代替

 SCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS
SN74ABT18640DLG4 TI

功能相似

 ABT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, PDSO56, GREEN, PLASTIC,

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