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SN65LVDS32B_07 PDF预览

SN65LVDS32B_07

更新时间: 2024-11-20 05:25:03
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德州仪器 - TI /
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描述
HIGH-SPEED DIFFERENTIAL RECEIVERS

SN65LVDS32B_07 数据手册

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SN65LVDS32B, SN65LVDT32B  
SN65LVDS3486B, SN65LVDT3486B  
SN65LVDS9637B, SN65LVDT9637B  
www.ti.com  
SLLS440BOCTOBER 2000REVISED APRIL 2007  
HIGH-SPEED DIFFERENTIAL RECEIVERS  
FEATURES  
SN65LVDS32B  
SN65LVDT32B  
Meets or Exceeds the Requirements of ANSI  
EIA/TIA-644 Standard for Signaling Rates (1) up  
to 400 Mbps  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
G
1B  
1A  
1Y  
VCC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
Operates With a Single 3.3-V Supply  
G
4B  
4A  
4Y  
G
SN65LVDT32B  
ONLY (4 Places)  
1A  
–2-V to 4.4-V Common-Mode Input Voltage  
Range  
1Y  
G
2Y  
1B  
Differential Input Thresholds <50 mV With  
50 mV of Hysteresis Over Entire Common-  
Mode Input Voltage Range  
2A  
11 3Y  
2A  
2B  
10  
9
2B  
GND  
3A  
3B  
2Y  
3Y  
4Y  
Integrated 110-Line Termination Resistors  
Offered With the LVDT Series  
3A  
3B  
4A  
4B  
Propagation Delay Times 4 ns (typ)  
Active Fail Safe Assures a High-Level Output  
With No Input  
Bus-Pin ESD Protection Exceeds 15 kV HBM  
Inputs Remain High-Impedance on Power  
Down  
SN65LVDS3486B  
SN65LVDT3486B  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
SN65LVDT3486B  
ONLY (4 Places)  
Recommended Maximum Parallel Rate of  
200 M-Transfer/s  
1B  
1A  
1Y  
VCC  
4B  
4A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
Available in Small-Outline Package With  
1,27-mm Terminal Pitch  
1A  
1B  
1Y  
1,2EN  
Pin-Compatible With the AM26LS32, MC3486,  
or µA9637  
1,2EN  
2Y  
4Y  
3,4EN  
2A  
2B  
2Y  
3Y  
4Y  
2A  
11 3Y  
DESCRIPTION  
10  
9
2B  
GND  
3A  
3B  
3A  
3B  
This family of differential line receivers offers  
improved performance and features that implement  
the electrical characteristics of low-voltage differential  
signaling (LVDS). LVDS is defined in the  
TIA/EIA-644 standard. This improved performance  
represents the second generation of receiver  
products for this standard, providing a better overall  
solution for the cabled environment. This generation  
of products is an extension to TI's overall product  
portfolio and is not necessarily a replacement for  
older LVDS receivers.  
3,4EN  
4A  
4B  
SN65LVDS9637B  
SN65LVDT9637B  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
VCC  
1Y  
2Y  
1
2
3
4
8
7
6
5
1A  
1A  
1B  
2A  
2B  
1Y  
2Y  
1B  
SN65LVDT9637B  
GND  
ONLY  
2A  
2B  
(1) Signaling rate, 1/t, where t is the minimum unit interval and is  
expressed in the units bit/s (bits per second).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2000–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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