5秒后页面跳转
SN65LV1212DBR PDF预览

SN65LV1212DBR

更新时间: 2024-11-20 21:01:47
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
22页 401K
描述
1:10 LVDS Serdes Receiver 100-400 Mbps 28-SSOP -40 to 85

SN65LV1212DBR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP28,.3针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.81差分输出:NO
驱动器位数:1输入特性:DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型:LINE RECEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:R-PDSO-G28JESD-609代码:e4
长度:10.2 mm湿度敏感等级:1
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP28,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
最大接收延迟:接收器位数:1
座面最大高度:2 mm子类别:Line Driver or Receivers
最大压摆率:75 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

SN65LV1212DBR 数据手册

 浏览型号SN65LV1212DBR的Datasheet PDF文件第2页浏览型号SN65LV1212DBR的Datasheet PDF文件第3页浏览型号SN65LV1212DBR的Datasheet PDF文件第4页浏览型号SN65LV1212DBR的Datasheet PDF文件第5页浏览型号SN65LV1212DBR的Datasheet PDF文件第6页浏览型号SN65LV1212DBR的Datasheet PDF文件第7页 
SN65LV1021  
SN65LV1212  
www.ti.com  
SLLS526GFEBRUARY 2002REVISED DECEMBER 2005  
10-MHz TO 40-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER  
FEATURES  
DESCRIPTION  
100-Mbps to 400-Mbps Serial LVDS Data  
Payload Bandwidth at 10-MHz to 40-MHz  
System Clock  
The SN65LV1021 serializer and SN65LV1212  
deserializer comprise  
a
10-bit serdes chipset  
designed to transmit and receive serial data over  
LVDS differential backplanes at equivalent parallel  
word rates from 10 MHz to 40 MHz. Including  
overhead, this translates into a serial data rate  
between 120-Mbps and 480-Mbps payload-encoded  
throughput.  
Pin-Compatible Superset of NSM  
DS92LV1021/DS92LV1212  
Chipset (Serializer/Deserializer) Power  
Consumption <350 mW (Typ) at 40 MHz  
Synchronization Mode for Faster Lock  
Lock Indicator  
Upon power up, the chipset link can be initialized via  
a synchronization mode with internally generated  
SYNC patterns, or the deserializer can be allowed to  
synchronize to random data. By using the  
synchronization mode, the deserializer establishes  
lock within specified, shorter time parameters.  
No External Components Required for PLL  
Low-Cost 28-Pin SSOP Package  
Industrial Temperature Qualified,  
TA = -40°C to 85°C  
The device can be entered into a power-down state  
when no data transfer is required. Alternatively, a  
mode is available to place the output pins in the  
high-impedance state without losing PLL lock.  
Programmable Edge Trigger on Clock  
(Rising or Falling Edge)  
Flow-Through Pinout for Easy PCB Layout  
The  
SN65LV1021  
and  
SN65LV1212  
are  
characterized for operation over ambient air  
temperature of -40°C to 85°C.  
SN65LV1021  
Serializer  
SN65LV1212  
Deserializer  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
SYNC1  
SYNC2  
DV  
DV  
AV  
AGND  
PWRDN  
AGND  
AGND  
RCLK_R/F  
REFCLK  
R
R
R
R
R
CC  
CC  
CC  
OUT0  
OUT1  
OUT2  
OUT3  
OUT4  
2
2
3
3
D
IN0  
D
IN1  
D
IN2  
D
IN3  
D
IN4  
D
IN5  
D
IN6  
D
IN7  
D
IN8  
D
IN9  
4
4
AV  
CC  
R +  
I
5
5
6
6
R –  
DV  
CC  
DGND  
DV  
I
7
7
D +  
PWRDN  
REN  
RCLK  
LOCK  
O
8
8
D –  
O
CC  
9
9
AGND  
DEN  
AGND  
DGND  
10  
11  
12  
13  
14  
10  
11  
12  
13  
14  
R
OUT5  
R
OUT6  
R
OUT7  
R
OUT8  
R
OUT9  
AV  
CC  
AV  
AGND  
AGND  
DGND  
CC  
TCLK_R/F  
TCLK  
DGND  
DGND  
ORDERING INFORMATION  
DEVICE  
Serializer  
PART NUMBER  
SN65LV1021DB  
SN65LV1212DB  
Deserializer  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–2005, Texas Instruments Incorporated  

SN65LV1212DBR 替代型号

型号 品牌 替代类型 描述 数据表
SN65LV1224BDBR TI

完全替代

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDB TI

类似代替

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADB TI

类似代替

10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

与SN65LV1212DBR相关器件

型号 品牌 获取价格 描述 数据表
SN65LV1224 TI

获取价格

30 MHZ TO 66MHZ 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224A TI

获取价格

10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224ADB TI

获取价格

10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224ADBR TI

获取价格

暂无描述
SN65LV1224B TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDB TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDBG4 TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDBR TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDBRG4 TI

获取价格

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224B-EP TI

获取价格

增强型产品 100Mbps 至 660Mbps、1:10 LVDS 串行器/解串器接收器