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Datasheet > SN65LV1224BMDBREP
SN65LV1224BMDBREP PDF预览

SN65LV1224BMDBREP

更新时间： 2024-11-19 11:10:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
27页 886K
描述
增强型产品 100Mbps 至 660Mbps、1:10 LVDS 串行器/解串器接收器 | DB | 28 | -55 to 125

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中文翻译

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SN65LV1224BMDBREP 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP, SSOP28,.3针数：28
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.66差分输出：NO
驱动器位数：1输入特性：DIFFERENTIAL
接口集成电路类型：LINE RECEIVER接口标准：GENERAL PURPOSE
JESD-30 代码：R-PDSO-G28JESD-609代码：e4
长度：10.2 mm湿度敏感等级：1
功能数量：1端子数量：28
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP28,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大接收延迟：
接收器位数：1座面最大高度：2 mm
子类别：Line Driver or Receivers最大压摆率：95 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmBase Number Matches：1

SN65LV1224BMDBREP 数据手册

 浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第2页浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第3页浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第4页浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第5页浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第6页浏览型号SN65LV1224BMDBREP的Datasheet PDF文件第7页 
SN65LV1023A-EP  
SN65LV1224B-EP  
www.ti.com  
SGLS358–SEPTEMBER 2006  
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER  
FEATURES  
•
100-Mbps to 660-Mbps Serial LVDS Data  
Payload Bandwidth at 10-MHz to 66-MHz  
System Clock  
•
Controlled Baseline  
– One Assembly/Test Site, One Fabrication  
Site  
•
•
Pin-Compatible Superset of  
DS92LV1023/DS92LV1224  
•
•
Extended Temperature Performance of –55°C  
to 125°C  
Chipset (Serializer/Deserializer) Power  
Consumption <450 mW (Typ) at 66 MHz  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
•
•
•
•
Synchronization Mode for Faster Lock  
Lock Indicator  
•
•
Enhanced Product-Change Notification  
(1)  
No External Components Required for PLL  
Qualification Pedigree  
28-Pin SSOP and Space Saving 5 × 5 mm  
QFN Packages Available  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
•
•
Programmable Edge Trigger on Clock  
Flow-Through Pinout for Easy PCB Layout  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION  
The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to  
transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz  
to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload  
encoded throughput.  
Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC  
patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode,  
the deserializer establishes lock within specified, shorter time parameters.  
The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is  
available to place the output pins in the high-impedance state without losing PLL lock.  
The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –55°C to  
125°C.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN65LV1023AMDBREP  
SN65LV1224BMDBREP  
TOP-SIDE MARKING  
LV1023AMEP  
-55°C to 125°C  
-55°C to 125°C  
SSOP - DB  
SSOP - DB  
Reel of 2000  
Reel of 2000  
LV1224BMEP  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...27

中文翻译

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SN65LV1224BMDBREP 替代型号

型号 品牌 替代类型 描述 数据表
DS92LV1224TMSA/NOPB TI

类似代替

 30-66 MHz 10-Bit Deserializer 28-SSOP -40 to 85
SN65LV1023ADBR TI

类似代替

 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADB TI

类似代替

 10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

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