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SN65LVCP1412RLHR PDF预览

SN65LVCP1412RLHR

更新时间: 2024-11-18 12:00:31
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
26页 1159K
描述
14.2-GBPS Dual Channel, Dual Mode Linear Equalizer

SN65LVCP1412RLHR 数据手册

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SN65LVCP1412  
www.ti.com  
SLLSED2 SEPTEMBER 2012  
14.2-GBPS Dual Channel, Dual Mode Linear Equalizer  
Check for Samples: SN65LVCP1412  
1
FEATURES  
Excellent Impedance Matching to 100Ω  
Differential PCB Transmission Lines  
GPIO or I2C Control  
Dual Channel, Uni-Directional, Multi-Rate,  
Dual-Mode Linear Equalizer with Operation up  
to 14.2Gbps Serial Data Rate for Backplane  
and Cable Interconnects  
2.5V and 3.3V±5% Single Power Supply  
2kV ESD (HBM)  
Linear Equalization Increases Link Margin for  
Systems Implementing Decision Feedback  
Equalizers (DFE)  
Flow-Through Pin-Out Provides Ease of  
Routing  
Small Package Size Saves Board Space  
18dB Analog Equalization at 7.1GHz with 1dB  
Step Control for Backplane Mode or Cable  
Mode  
APPLICATIONS  
High Speed Links in Telecommunication and  
Data communication  
Output Linear Dynamic Range: 1200mV  
Bandwidth: >20GHz – Typical  
Backplane and Cable Interconnects for 10GbE,  
16GFC,10G SONET, SAS, SATA, CPRI, OBSAI,  
Infiniband, 10GBase-KR, and XFI/SFI  
Better than 15dB Return Loss at 7.1GHz  
Supports Out-of-Band (OOB) Signaling  
Low Power: Typically 75mW per Channel at  
2.5V VCC  
24-Terminal QFN (Quad Flatpack, No-Lead)  
4mm x 5mm x 0.75mm; 0.5mm Terminal Pitch  
DESCRIPTION  
The SN65LVCP1412 is an asynchronous, protocol-agnostic, low latency, two-channel linear equalizer optimized  
for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of  
SN65LVCP1412 is designed to work with an ASIC or a FPGA with digital equalization employing Decision  
Feedback Equalizers (DFE). SN65LVCP1412 linear equalizer preserves the shape of the transmitted signal  
ensuring optimum DFE performance. SN65LVCP1412 provides a low power solution while at the same time  
extending the effectiveness of DFE.  
SN65LVCP1412 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1412  
enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each  
individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all  
channels using the GPIO Input pins.  
SN65LVCP1412 outputs can be disabled independently via I2C.  
The SN65LVCP1412 operates from a single 2.5V or 3.3V power supply.  
The package for the SN65LVCP1412 is a 24 pin 4mm x 5mm x 0.75mm QFN (Quad Flatpack, No-lead) lead-free  
package with 0.5mm pitch, and characterized for operation from –40°C to 85°C.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2012, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN65LVCP1412RLHR 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVCP1412RLHT TI

完全替代

14.2-GBPS Dual Channel, Dual Mode Linear Equalizer
DS32EV100SD/NOPB TI

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可编程单式均衡器 | NHK | 14 | -40 to 85
SN65LVCP1414RLJT TI

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14.2Gbps 四通道、双模线性均衡器 | RLJ | 38 | -40 to 85

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