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www.ti.com
SLLS553 – NOVEMBER 2002
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FEATURES
DESCRIPTION
D
D
D
D
D
High Speed (>1000 Mbps) Upgrade for
DS90CP22 2x2 LVDS Crosspoint Switch
The SN65LVCP22 is a 2x2 crosspoint switch providing
greater than 1000 Mbps operation for each path. The dual
channels incorporate wide common-mode (0 V to 4 V)
receivers, allowing for the receipt of LVDS, LVPECL, and
CML signals. The dual outputs are LVDS drivers to provide
low-power, low-EMI, high-speed operation. The
SN65LVCP22 provides a single device supporting 2:2
buffering (repeating), 1:2 splitting, 2:1 multiplexing, 2x2
switching, and LVPECL/CML to LVDS level translation on
each channel. The flexible operation of the SN65LVCP22
provides a single device to support the redundant serial
bus transmission needs (working and protection switching
cards) of fault–tolerant switch systems found in optical
LVPECL Crosspoint Switch Available in
SN65LVCP23
Low-Jitter 1000-Mbps Fully Differential Data
Path
20 ps (Typ), 50 ps (Max), of Peak-to-Peak
23
Jitter With PRBS = 2 –1 Pattern at 1000 Mbps
Less Than 200 mW (Typ), 280 mW (Max) Total
Power Dissipation
D
Balanced Output Impedance
networking,
wireless
infrastructure,
and
data
D
Output (Channel-to-Channel) Skew Is 10 ps
(Typ), 20 ps (Max)
communications systems. TI offers additional gigibit
repeater/translator and crosspoint products in the
SN65LVDS100 and SN65LVDS122.
D
D
Configurable as 2:1 Mux, 1:2 Demux,
Repeater or 1:2 Signal Splitter
The SN65LVCP22 uses a fully differential data path to
ensure low-noise generation, fast switching times, low
pulse width distortion, and low jitter. Output jitter is less
than 20 ps (typ), and 50 ps (max), to provide an eye that
is at least 95 % open at 1000 Mbps. Output channel-to-
channel skew is less than 10 ps (typ) and 20 ps (max) to
ensure accurate alignment of outputs in all applications.
Both SOIC and TSSOP package options are available to
allow easy upgrade for existing solutions, and board area
savings where space is critical.
Inputs Accept LVDS, LVPECL, and CML
Signals
D
Fast Switch Time of 1.2 ns (Typ), 1.5 ns (Max)
D
Fast Propagation Delay of 0.65 ns (Typ),
0.8 ns (Max)
D
D
D
Receiver Input Threshold < ±50 mV
16 Lead SOIC and TSSOP Packages
Inter-Operates With TIA/EIA–644–A LVDS
Standard
D or PW PACKAGE
(TOP VIEW)
D
Operating Temperature: –40°C to 85°C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SEL1
SEL0
IN0+
IN0–
VCC
IN1+
IN1–
NC
EN0
EN1
APPLICATIONS
OUT0+
OUT0–
GND
OUT1+
OUT1–
NC
D
D
D
D
D
D
Base stations
Add/Drop Muxes
Protection Switching for Serial Backplanes
Network Switches/Routers
Optical Networking Line Cards/Switches
Clock Distribution
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2002, Texas Instruments Incorporated