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SN65LV1224BDBG4 PDF预览

SN65LV1224BDBG4

更新时间: 2024-11-18 04:51:15
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
29页 718K
描述
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

SN65LV1224BDBG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:SSOP, SSOP28,.3针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.12Is Samacsys:N
差分输出:NO驱动器位数:1
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:GENERAL PURPOSEJESD-30 代码:R-PDSO-G28
JESD-609代码:e4长度:10.2 mm
湿度敏感等级:1功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:2 V
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP28,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:
接收器位数:1座面最大高度:2 mm
子类别:Line Driver or Receivers最大压摆率:95 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V电源电压1-最大:3.6 V
电源电压1-分钟:3 V电源电压1-Nom:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.3 mmBase Number Matches:1

SN65LV1224BDBG4 数据手册

 浏览型号SN65LV1224BDBG4的Datasheet PDF文件第2页浏览型号SN65LV1224BDBG4的Datasheet PDF文件第3页浏览型号SN65LV1224BDBG4的Datasheet PDF文件第4页浏览型号SN65LV1224BDBG4的Datasheet PDF文件第5页浏览型号SN65LV1224BDBG4的Datasheet PDF文件第6页浏览型号SN65LV1224BDBG4的Datasheet PDF文件第7页 
SN65LV1023A  
SN65LV1224B  
www.ti.com  
SLLS621CSEPTEMBER 2004REVISED FEBRUARY 2006  
10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER  
FEATURES  
Lock Indicator  
100-Mbps to 660-Mbps Serial LVDS Data  
Payload Bandwidth at 10-MHz to 66-MHz  
System Clock  
No External Components Required for PLL  
28-Pin SSOP and Space Saving 5 × 5 mm QFN  
Packages Available  
Pin-Compatible Superset of  
DS92LV1023/DS92LV1224  
Industrial Temperature Qualified, TA = –40°C  
to 85°C  
Chipset (Serializer/Deserializer) Power  
Consumption <450 mW (Typ) at 66 MHz  
Programmable Edge Trigger on Clock  
Flow-Through Pinout for Easy PCB Layout  
Synchronization Mode for Faster Lock  
DESCRIPTION  
The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to  
transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz  
to 66 MHz. Including overhead, this translates into a serial data rate between 120-Mbps and 792-Mbps payload  
encoded throughput.  
Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC  
patterns or the deserializer can be allowed to synchronize to random data. By using the synchronization mode,  
the deserializer establishes lock within specified, shorter time parameters.  
The device can be entered into a power-down state when no data transfer is required. Alternatively, a mode is  
available to place the output pins in the high-impedance state without losing PLL lock.  
The SN65LV1023A and SN65LV1224B are characterized for operation over ambient air temperature of –40°C to  
85°C.  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
SYNC1  
SYNC2  
DV  
DV  
AV  
AGND  
PWRDN  
AGND  
CC  
CC  
CC  
2
3
D
IN0  
D
IN1  
D
IN2  
D
IN3  
D
IN4  
D
IN5  
D
IN6  
D
IN7  
D
IN8  
D
IN9  
32 31 30 29 28 27 26 25  
4
D
D
1
24  
23  
22  
21  
20  
19  
18  
17  
AGND  
IN1  
5
2
3
4
5
6
7
8
2
PWRDN  
AGND  
6
IN  
IN  
DB Package  
SN65LV1023A  
Serializer  
7
D +  
D
3
O
RHB Package  
SN65LV1023A  
Serializer  
8
D −  
O
D
IN4  
D
IN5  
D
IN6  
D
IN7  
D
IN8  
D
O+  
D
O−  
9
AGND  
DEN  
AGND  
10  
11  
12  
13  
14  
(Top View)  
AGND  
DEN  
AV  
CC  
TCLK_R/F  
TCLK  
DGND  
DGND  
AGND  
9
10 11 12 13 14 15 16  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

SN65LV1224BDBG4 替代型号

型号 品牌 替代类型 描述 数据表
SN65LV1224BDB TI

完全替代

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1224BDBR TI

类似代替

10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER
SN65LV1023ADB TI

类似代替

10-MHz TO 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER

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SN65LV1224DBG4 TI

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LINE RECEIVER, PDSO28, GREEN, PLASTIC, SSOP-28