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SN65CML100DG4 PDF预览

SN65CML100DG4

更新时间： 2024-11-05 14:44:51
品牌 Logo 应用领域
德州仪器 - TI 光电二极管接口集成电路
页数 文件大小 规格书
19页 1169K
描述
1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85

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SN65CML100DG4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP8,.25
针数：8Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.1
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：4.9 mm
湿度敏感等级：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Line Driver or Receivers最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mmBase Number Matches：1

SN65CML100DG4 数据手册

 浏览型号SN65CML100DG4的Datasheet PDF文件第2页浏览型号SN65CML100DG4的Datasheet PDF文件第3页浏览型号SN65CML100DG4的Datasheet PDF文件第4页浏览型号SN65CML100DG4的Datasheet PDF文件第5页浏览型号SN65CML100DG4的Datasheet PDF文件第6页浏览型号SN65CML100DG4的Datasheet PDF文件第7页 
SN65CML100  
www.ti.com  
SLLS547–NOVEMBER 2002  
1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER  
FEATURES  
DESCRIPTION  
•
Provides Level Translation From LVDS or  
LVPECL to CML, Repeating From CML to CML  
Signaling Rates(1) up to 1.5 Gbps  
This high-speed translator/repeater is designed for  
signaling rates up to 1.5 Gbps to support various  
high-speed network routing applications. The driver  
output is compatible with current-mode logic (CML)  
levels, and directly drives 50-Ω or 25-Ω loads  
connected to 1.8-V, 2.5-V, or 3.3-V nominal supplies.  
The capability for direct connection to the loads may  
eliminate the need for coupling capacitors. The  
receiver input is compatible with LVDS (TIA/EIA-644),  
LVPECL, and CML signaling levels. The receiver  
tolerates a wide common-mode voltage range, and  
may also be directly coupled to the signal source.  
The internal data path from input to output is fully  
differential for low noise generation and low  
pulse-width distortion.  
•
•
CML Compatible Output Directly Drives  
Devices With 3.3-V, 2.5-V, or 1.8-V Supplies  
•
•
•
Total Jitter < 70 ps  
Low 100 ps (Max) Part-To-Part Skew  
Wide Common-Mode Receiver Capability  
Allows Direct Coupling of Input Signals  
•
25 mV of Receiver Input Threshold Hysteresis  
Over 0-V to 4-V Common-Mode Range  
•
•
•
Propagation Delay Times, 800 ps Maximum  
3.3-V Supply Operation  
The VBB pin is an internally generated voltage supply  
to allow operation with a single-ended LVPECL input.  
For single-ended LVPECL input operation, the  
unused differential input is connected to VBB as a  
switching reference voltage. When used, decouple  
VBB with a 0.01-µF capacitor and limit the current  
sourcing or sinking to 400 µA. When not used, VBB  
should be left open.  
Available in SOIC and MSOP Packages  
APPLICATIONS  
•
•
•
•
•
Level Translation  
622-MHz Central Office Clock Distribution  
High-Speed Network Routing  
Wireless Basestations  
Low Jitter Clock Repeater(1)  
This device is characterized for operation from –40°C  
to 85°C.  
(1) The signaling rate of a line is the number of voltage  
transitions that are made per second expressed in the units  
bps (bits per second).  
EYE PATTERN  
FUNCTIONAL DIAGRAM  
8
2
3
4
V
V
BB  
CC  
1.5 Gbps  
23  
2
-1 PRBS  
7
6
A
B
Y
Vertical Scale = 500 mV/div  
750 MHz  
Z
Horizontal Scale = 200 ps/div  
V
= 3.3 V, T = 25°C,  
V
= 200 mV, V = 1.2 V, V = 3.3 V, R = 50 Ω  
IC TT  
CC  
A
ID  
T
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2002–TBD, Texas Instruments Incorporated  
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SN65CML100DG4 替代型号

型号 品牌 替代类型 描述 数据表
SN65CML100DR TI

完全替代

 1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | D | 8
SN65CML100DRG4 TI

完全替代

 1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85
SN65CML100D TI

完全替代

 1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER

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SN65CML100DGKG4 TI

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SN65CML100DGKR TI

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 		1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | DGK |
SN65CML100DR TI

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 		1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | D | 8
SN65CML100DRG4 TI

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 		1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85
SN65DP141 TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器
SN65DP141RLJR TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器 | RLJ | 38 | -40
SN65DP141RLJT TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器 | RLJ | 38 | -40
SN65DP149 TI

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 		工作温度为 -40°C 至 85°C 的 3.4Gbps DP++ 1.1 至 HDMI
SN65DP149RSBR TI

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 		工作温度为 -40°C 至 85°C 的 3.4Gbps DP++ 1.1 至 HDMI

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