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SN65CML100D PDF预览

SN65CML100D

更新时间： 2024-11-05 04:51:15
品牌 Logo 应用领域
德州仪器 - TI 中继器
页数 文件大小 规格书
15页 154K
描述
1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER

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SN65CML100D 数据手册

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www.ti.com  
SN65CML100  
SLLS547 – NOVEMBER 2002  
1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER  
FEATURES  
DESCRIPTION  
D
Provides Level Translation From LVDS or  
LVPECL to CML, Repeating From CML to  
CML  
This high-speed translator/repeater is designed for  
signaling rates up to 1.5 Gbps to support various  
high-speed network routing applications. Thedriveroutput  
is compatible with current-mode logic (CML) levels, and  
directly drives 50-Ω or 25-Ω loads connected to 1.8-V,  
2.5-V, or 3.3-V nominal supplies. The capability for direct  
connection to the loads may eliminate the need for  
coupling capacitors. The receiver input is compatible with  
LVDS (TIA/EIA–644), LVPECL, and CML signaling levels.  
The receiver tolerates a wide common-mode voltage  
range, and may also be directly coupled to the signal  
source. The internal data path from input to output is fully  
differential for low noise generation and low pulse-width  
distortion.  
1
D
D
Signaling Rates up to 1.5 Gbps  
CML Compatible Output Directly Drives  
Devices With 3.3-V, 2.5-V, or 1.8-V Supplies  
D
D
D
Total Jitter < 70 ps  
Low 100 ps (Max) Part-To-Part Skew  
Wide Common-Mode Receiver Capability  
Allows Direct Coupling of Input Signals  
D
25 mV of Receiver Input Threshold Hysteresis  
Over 0-V to 4-V Common-Mode Range  
D
D
D
Propagation Delay Times, 800 ps Maximum  
3.3-V Supply Operation  
The VBB pin is an internally generated voltage supply to  
allow operation with a single-ended LVPECL input. For  
single-ended LVPECL input operation, the unused  
differential input is connected to VBB as a switching  
reference voltage. When used, decouple VBB with a  
0.01-µF capacitor and limit the current sourcing or sinking  
to 400 µA. When not used, VBB should be left open.  
Available in SOIC and MSOP Packages  
APPLICATIONS  
D
D
D
D
D
Level Translation  
622-MHz Central Office Clock Distribution  
High-Speed Network Routing  
Wireless Basestations  
This device is characterized for operation from –40°C to  
85°C.  
Low Jitter Clock Repeater  
EYE PATTERN  
FUNCTIONAL DIAGRAM  
8
2
3
4
V
V
BB  
CC  
1.5 Gbps  
–1 PRBS  
23  
2
7
6
A
B
Y
Z
Vertical Scale = 500 mV/div  
750 MHz  
Horizontal Scale = 200 ps/div  
V
= 3.3 V, T = 25°C,  
V
= 200 mV, V = 1.2 V, V = 3.3 V, R = 50 Ω  
IC TT  
CC  
A
ID  
T
Pleasebe aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
1
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
PRODUCTION DATA information is current as of publication date. Products  
conform to specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all parameters.  
Copyright 2002, Texas Instruments Incorporated  
1234567...15

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SN65CML100D 替代型号

型号 品牌 替代类型 描述 数据表
SN65CML100DR TI

完全替代

 1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | D | 8
SN65CML100DRG4 TI

完全替代

 1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85
SN65CML100DG4 TI

完全替代

 1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85

与SN65CML100D相关器件

型号 品牌 获取价格 描述 数据表
SN65CML100DG4 TI

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 		1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85
SN65CML100DGK TI

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 		1.5-Gbps LVDS/LVPECL/CML-TO-CML TRANSLATOR/REPEATER
SN65CML100DGKG4 TI

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 		1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | DGK |
SN65CML100DGKR TI

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 		1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | DGK |
SN65CML100DR TI

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 		1.5Gbps LVDS/LVPECL/CML 至 CML 转换器/中继器 | D | 8
SN65CML100DRG4 TI

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 		1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 8-SOIC -40 to 85
SN65DP141 TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器
SN65DP141RLJR TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器 | RLJ | 38 | -40
SN65DP141RLJT TI

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 		12Gbps DP 1.4/eDP1.4 线性转接驱动器 | RLJ | 38 | -40
SN65DP149 TI

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 		工作温度为 -40°C 至 85°C 的 3.4Gbps DP++ 1.1 至 HDMI

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