5秒后页面跳转
捷配首页

Datasheet > SN65DSI83ZQET
SN65DSI83ZQET PDF预览

SN65DSI83ZQET

更新时间： 2024-11-09 20:51:51
品牌 Logo 应用领域
德州仪器 - TI 电信电信集成电路
页数 文件大小 规格书
34页 1049K
描述
IC SPECIALTY TELECOM CIRCUIT, Telecom IC:Other

阅读下载

中文翻译

获取价格

SN65DSI83ZQET 技术参数

生命周期：Obsolete包装说明：LEAD FREE, PLASTIC, BGA-64
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.26JESD-30 代码：S-PBGA-B64
长度：5 mm功能数量：1
端子数量：64最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH座面最大高度：1 mm
标称供电电压：1.8 V表面贴装：YES
电信集成电路类型：TELECOM CIRCUIT温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.5 mm
端子位置：BOTTOM宽度：5 mm
Base Number Matches：1

SN65DSI83ZQET 数据手册

 浏览型号SN65DSI83ZQET的Datasheet PDF文件第2页浏览型号SN65DSI83ZQET的Datasheet PDF文件第3页浏览型号SN65DSI83ZQET的Datasheet PDF文件第4页浏览型号SN65DSI83ZQET的Datasheet PDF文件第5页浏览型号SN65DSI83ZQET的Datasheet PDF文件第6页浏览型号SN65DSI83ZQET的Datasheet PDF文件第7页 
SN65DSI83  
www.ti.com  
SLLSEC1D –SEPTEMBER 2012–REVISED DECEMBER 2012  
MIPI® DSI BRIDGE TO FLATLINK™ LVDS  
Single Channel DSI to Single-Link LVDS Bridge  
Check for Samples: SN65DSI83  
1
FEATURES  
•
Implements MIPI® D-PHY Version 1.00.00  
Reference Clock (REFCLK)  
1.8 V Main VCC Power Supply  
234  
Physical Layer Front-End and Display Serial  
Interface (DSI) Version 1.02.00  
•
•
Low Power Features Include SHUTDOWN  
Mode, Reduced LVDS Output Voltage Swing,  
Common Mode, and MIPI® Ultra-Low Power  
State (ULPS) Support  
•
Single Channel DSI Receiver Configurable for  
One, Two, Three, or Four D-PHY Data Lanes  
Per Channel Operating up to 1 Gbps Per Lane  
•
•
Supports 18 bpp and 24 bpp DSI Video  
Packets with RGB666 and RGB888 Formats  
•
LVDS Channel SWAP, LVDS PIN Order  
Reverse Feature for Ease of PCB Routing  
Max Resolution up to 60 fps WUXGA 1920 x  
1200 at 18 bpp and 24 bpp Color with Reduced  
Blanking. Suitable for 60 fps 1366 x 768 / 1280  
x 800 at 18 bpp and 24 bpp  
•
•
•
ESD Rating ±2 kV (HBM)  
Packaged in 64-pin 5x5mm PBGA (ZQE)  
Temperature Range: -40°C to 85°C  
•
•
FlatLink™ Output for Single-Link LVDS  
APPLICATIONS  
Supports Single Channel DSI to Single-Link  
LVDS Operating Mode  
•
•
Tablet PC, Notebook PC, Netbooks  
Mobile Internet Devices  
•
•
LVDS Output Clock Range of 25 MHz to 154  
MHz  
LVDS Pixel Clock May be Sourced from Free-  
Running Continuous D-PHY Clock or External  
DESCRIPTION  
The SN65DSI83 DSI to FlatLink™ bridge features a single-channel MIPI® D-PHY receiver front-end  
configuration with 4 lanes per channel operating at 1Gbps per lane; a maximum input bandwidth of 4 Gbps. The  
bridge decodes MIPI® DSI 18 bpp RGB666 and 24 bpp RGB888 packets and converts the formatted video data  
stream to a FlatLink™ compatible LVDS output operating at pixel clocks operating from 25 MHz to 154 MHz,  
offering a Single-Link LVDS with four data lanes per link.  
The SN65DSI83 can support up to WUXGA 1920 x 1200 at 60 frames per second, at 24 bpp with reduced  
blanking. It is also suitable for applications using 60 fps 1366 x 768 / 1280 x 800 at 18 bpp and 24 bpp. Partial  
line buffering is implemented to accommodate the data stream mismatch between the DSI and LVDS interfaces.  
Designed with industry compliant interface technology, the SN65DSI83 is compatible with a wide range of micro-  
processors, and is designed with a range of power management features including low-swing LVDS outputs, and  
the MIPI® defined ultra-low power state (ULPS) support.  
The SN65DSI83 is implemented in a small outline 5x5mm PBGA at 0.5 mm pitch package, and operates across  
a temperature range from -40ºC to 85ºC.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
FlatLink is a trademark of Texas Instruments.  
MIPI is a registered trademark of Arasan Chip Systems, Inc.  
All other trademarks are the property of their respective owners.  
PRODUCT PREVIEW information concerns products in the  
formative or design phase of development. Characteristic data and  
other specifications are design goals. Texas Instruments reserves  
the right to change or discontinue these products without notice.  
Copyright © 2012, Texas Instruments Incorporated  
1234567...34

中文翻译

下载PDF

与SN65DSI83ZQET相关器件

型号 品牌 获取价格 描述 数据表
SN65DSI83ZXHR TI

获取价格

 		SN65DSI83 MIPI® DSI Bridge to FlatLink™ LV
SN65DSI84 TI

获取价格

 		MIPI DSI BRIDGE TO FLATLINK LVDS Single Channel DSI to Dual-Link LVDS Bridge
SN65DSI84_V01 TI

获取价格

 		SN65DSI84 MIPI® DSI Bridge To FLATLINK™ LV
SN65DSI84-Q1 TI

获取价格

 		汽车类单通道 MIPI® DSI 转双链路 LVDS 桥接器
SN65DSI84TPAPRQ1 TI

获取价格

 		汽车类单通道 MIPI® DSI 转双链路 LVDS 桥接器 | PAP | 64 | -
SN65DSI84ZQER TI

获取价格

 		MIPI DSI BRIDGE TO FLATLINK LVDS Single Channel DSI to Dual-Link LVDS Bridge
SN65DSI84ZXHR TI

获取价格

 		SN65DSI84 MIPI® DSI Bridge To FLATLINK™ LV
SN65DSI85 TI

获取价格

 		MIPI DSI BRIDGE TO FLATLINK LVDS Dual Channel DSI to Dual-Link LVDS Bridge
SN65DSI85-Q1 TI

获取价格

 		汽车类双通道 MIPI DSI 转双链路 FlatLink™ LVDS 桥接器
SN65DSI85TPAPRQ1 TI

获取价格

 		汽车类双通道 MIPI DSI 转双链路 FlatLink™ LVDS 桥接器 | PAP

与SN65DSI83ZQET相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证