5秒后页面跳转
捷配首页

Datasheet > SN54LVTH241_06
SN54LVTH241_06 PDF预览

SN54LVTH241_06

更新时间： 2024-11-05 05:04:55
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
13页 302K
描述
3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN54LVTH241_06 数据手册

 浏览型号SN54LVTH241_06的Datasheet PDF文件第2页浏览型号SN54LVTH241_06的Datasheet PDF文件第3页浏览型号SN54LVTH241_06的Datasheet PDF文件第4页浏览型号SN54LVTH241_06的Datasheet PDF文件第5页浏览型号SN54LVTH241_06的Datasheet PDF文件第6页浏览型号SN54LVTH241_06的Datasheet PDF文件第7页 
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢉ
ꢊ
ꢀ
ꢁ
ꢋ
ꢃ
ꢌ ꢍꢌ ꢎꢅ ꢏꢐꢆ ꢑ ꢒꢆꢏꢄ ꢐꢓꢔ ꢔ ꢕꢖꢀ ꢗ ꢘꢖ ꢙ ꢅꢕ ꢖ  
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢉ
ꢀ
ꢀ
ꢚ ꢙꢆ ꢇ ꢌ ꢎꢀꢆꢏꢆ ꢕ ꢑ ꢓꢆ ꢛꢓ ꢆ  
SCAS352K − MARCH 1994 − REVISED OCTOBER 2003  
SN54LVTH241 . . . J OR W PACKAGE  
SN74LVTH241 . . . DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
)
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
13 2A2  
12 1Y4  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
11  
2A1  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
SN54LVTH241 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
3
2 1 20 19  
18  
These octal buffers/drivers are designed  
1A2  
2Y3  
1A3  
2Y2  
1A4  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
4
5
6
7
8
specifically for low-voltage (3.3-V) V  
operation,  
17  
16  
15  
14  
CC  
with the capability to provide a TTL interface to a  
5-V system environment.  
The ’LVTH241 devices are organized as two 4-bit  
line drivers with separate output-enable (1OE,  
2OE) inputs. When 1OE is low or 2OE is high, the  
devices pass noninverted data from the A inputs  
to the Y outputs. When 1OE is high or 2OE is low,  
the outputs are in the high-impedance state.  
9 10 11 12 13  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
ORDERABLE  
†
T
PACKAGE  
TOP-SIDE MARKING  
A
PART NUMBER  
SN74LVTH241DW  
SN74LVTH241DWR  
SN74LVTH241NSR  
SN74LVTH241DBR  
SN74LVTH241PW  
SN74LVTH241PWR  
SNJ54LVTH241J  
Tube  
SOIC − DW  
LVTH241  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVTH241  
LXH241  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
LXH241  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54LVTH241J  
SNJ54LVTH241W  
SNJ54LVTH241FK  
Tube  
SNJ54LVTH241W  
SNJ54LVTH241FK  
−55°C to 125°C  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢓ ꢁ ꢄꢕꢀꢀ ꢑ ꢆꢇ ꢕꢖꢚ ꢙꢀ ꢕ ꢁ ꢑꢆꢕꢘ ꢜꢝ ꢞꢟ ꢠꢡꢢ ꢣꢤꢥ ꢦꢜ ꢢꢡ ꢦꢜꢧ ꢞꢦꢟ ꢛꢖ ꢑ ꢘ ꢓ ꢒꢆ ꢙꢑ ꢁ  
ꢜ
ꢘ
ꢏ
ꢆ
ꢏ
ꢞ
ꢦ
ꢨ
ꢡ
ꢩ
ꢤ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢢ
ꢣ
ꢩ
ꢩ
ꢥ
ꢦ
ꢜ
ꢧ
ꢟ
ꢡ
ꢨ
ꢪ
ꢣ
ꢫ
ꢬ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢠ
ꢧ
ꢥ
ꢍ
ꢛ
ꢩ
ꢡ
ꢠ
ꢣ
ꢢ
ꢜ
ꢟ
ꢢ
ꢡ
ꢦ
ꢨ
ꢡ
ꢩ
ꢤ
ꢜ
ꢡ
ꢟ
ꢪ
ꢥ
ꢢ
ꢞ
ꢨ
ꢞ
ꢢ
ꢧ
ꢜ
ꢞ
ꢡ
ꢦ
ꢟ
ꢪ
ꢥ
ꢩ
ꢜ
ꢝ
ꢥ
ꢜ
ꢥ
ꢩ
ꢤ
ꢟ
ꢡ
ꢨ
ꢆ
ꢥ
ꢭ
ꢧ
ꢟ
ꢙ
ꢦ
ꢟ
ꢜ
ꢩ
ꢣ
ꢤ
ꢥ
ꢦ
ꢜ
ꢟ
ꢟ
ꢜ
ꢧ
ꢦ
ꢠ
ꢧ
ꢩ
ꢠ
ꢮ
ꢧ
ꢩ
ꢩ
ꢧ
ꢦ
ꢜ
ꢯ
ꢍ
ꢛ
ꢩ
ꢡ
ꢠ
ꢣ
ꢢ
ꢜ
ꢞ
ꢡ
ꢦ
ꢪꢧ ꢩ ꢧ ꢤ ꢥ ꢜ ꢥ ꢩ ꢟ ꢍ  
ꢪ
ꢩ
ꢡ
ꢢ
ꢥ
ꢟ
ꢟ
ꢞ
ꢦ
ꢰ
ꢠ
ꢡ
ꢥ
ꢟ
ꢦ
ꢡ
ꢜ
ꢦ
ꢥ
ꢢ
ꢥ
ꢟ
ꢟ
ꢧ
ꢩ
ꢞ
ꢬ
ꢯ
ꢞ
ꢦ
ꢢ
ꢬ
ꢣ
ꢠ
ꢥ
ꢜ
ꢥ
ꢟ
ꢜ
ꢞ
ꢦ
ꢰ
ꢡ
ꢨ
ꢧ
ꢬ
ꢬ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...13

中文翻译

下载PDF

与SN54LVTH241_06相关器件

型号 品牌 获取价格 描述 数据表
SN54LVTH241FK TI

获取价格

 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54LVTH241J TI

获取价格

 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54LVTH244A TI

获取价格

 		3.3 V ABT OCTAL BUFFERS / DRIVERS WITH 3 STATE OUTPUTS
SN54LVTH244A_07 TI

获取价格

 		3.3-v abt octal buffers/drivers with 3-state outputs
SN54LVTH244A_09 TI

获取价格

 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54LVTH244A_10 TI

获取价格

 		3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN54LVTH244AFK TI

获取价格

 		暂无描述
SN54LVTH244AJ TI

获取价格

 		LVT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20
SN54LVTH244A-SP TI

获取价格

 		具有总线保持、TTL 兼容型 CMOS 输入和三态输出的航天类 8 通道、2.7V 至 3
SN54LVTH244AW TI

获取价格

 		LVT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDFP20

与SN54LVTH241_06相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证