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SI5459DU-T1-GE3

更新时间: 2024-11-05 19:54:19
品牌 Logo 应用领域
威世 - VISHAY 开关脉冲晶体管
页数 文件大小 规格书
9页 190K
描述
Power Field-Effect Transistor, 6.7A I(D), 20V, 0.052ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HALOGEN FREE AND ROHS COMPLIANT, LEADLESS, POWERPAK, CHIPFET-8

SI5459DU-T1-GE3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred包装说明:SMALL OUTLINE, R-XDSO-N3
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:7.38
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:20 V最大漏极电流 (ID):6.7 A
最大漏源导通电阻:0.052 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-XDSO-N3JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260极性/信道类型:P-CHANNEL
最大脉冲漏极电流 (IDM):20 A认证状态:Not Qualified
表面贴装:YES端子面层:PURE MATTE TIN
端子形式:NO LEAD端子位置:DUAL
处于峰值回流温度下的最长时间:30晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

SI5459DU-T1-GE3 数据手册

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Si5459DU  
Vishay Siliconix  
www.vishay.com  
P-Channel 20 V (D-S) MOSFET  
FEATURES  
• TrenchFET® power MOSFET  
PRODUCT SUMMARY  
VDS (V)  
RDS(on) ()  
ID (A) a  
-8 e  
Qg (TYP.)  
• 100 % Rg tested  
0.052 at VGS = -4.5 V  
0.082 at VGS = -2.5 V  
-20  
8
• Material categorization:  
-7.5  
for definitions of compliance please see  
www.vishay.com/doc?99912  
PowerPAK® ChipFET® Single  
D
APPLICATIONS  
S
D
7
8
D
6
• Load switch  
• HDD DC/DC  
S
5
1
D
G
2
D
S
9
3
D
4
G
1
Top View  
Bottom View  
Ordering Information:   
Si5459DU-T1-GE3 (Lead (Pb)-free and halogen-free)  
D
P-Channel MOSFET  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
-20  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
V
VGS  
12  
T
C = 25 °C  
-8 e  
TC = 70 °C  
TA = 25 °C  
TA = 70 °C  
-8 e  
Continuous Drain Current (TJ = 150 °C)  
ID  
-6.7 b, c  
-5.3 b, c  
-20  
-8 e  
-2.9 b, c  
A
Pulsed Drain Current (10 μs pulse width)  
Source-Drain Current Diode Current  
IDM  
IS  
T
C = 25 °C  
TA = 25 °C  
T
T
C = 25 °C  
C = 70 °C  
10.9  
7
Maximum Power Dissipation  
PD  
W
TA = 25 °C  
TA = 70 °C  
3.5 b, c  
2.2 b, c  
-50 to 150  
260  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak temperature) d, e  
TJ, Tstg  
°C  
THERMAL RESISTANCE RATINGS  
LIMIT  
PARAMETER  
SYMBOL  
UNIT  
TYPICAL  
MAXIMUM  
36  
Maximum Junction-to-Ambient b, d  
Maximum Junction-to-Case (Drain)  
t 10 s  
RthJA  
RthJC  
30  
°C/W  
Steady State  
9.5  
11.5  
Notes  
a. Based on TC = 25 °C.  
b. Surface mounted on 1" x 1" FR4 board.  
c. t = 10 s.  
d. Maximum under steady state conditions is 72 °C/W.  
e. Package limited.  
f. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed  
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed  
and is not required to ensure adequate bottom side solder interconnection.  
g. Rework conditions: Manual soldering with a soldering iron is not recommended for leadless components.  
S16-0980-Rev. C, 23-May-16  
Document Number: 65017  
1
For technical questions, contact: pmostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  

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