SI5319B-C-GMR

更新时间： 2024-11-19 13:13:31

品牌	Logo	应用领域
芯科 - SILICON		衰减器时钟
页数	文件大小	规格书
16页	252K
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SI5319B-C-GMR 数据手册

Si5319

PRELIMINARY DATA SHEET

ANY-RATE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Description

Features

The Si5319 is a jitter-attenuating precision M/N clock

multiplier for applications requiring sub 1 ps jitter

performance. The Si5319 accepts one clock input ranging

from 2 kHz to 710 MHz and generates one clock output

ranging from 2 kHz to 945 MHz and select frequencies to

1.4 GHz. The Si5319 can also use its crystal oscillator as a

clock source for frequency synthesis. The device provides

virtually any frequency translation combination across this

operating range. The Si5319 input clock frequency and clock

multiplication ratio are programmable through an I²C or SPI

interface. The Si5319 is based on Silicon Laboratories' 3rd-

generation DSPLL^®technology, which provides any-rate

frequency synthesis and jitter attenuation in a highly

integrated PLL solution that eliminates the need for external

VCXO and loop filter components. The DSPLL loop

bandwidth is digitally programmable, providing jitter

performance optimization at the application level. Operating

from a single 1.8, 2.5, or 3.3 V supply, the Si5319 is ideal for

providing clock multiplication and jitter attenuation in high

performance timing applications.

ꢀ Generates any frequency from 2 kHz to 945 MHz

and select frequencies to 1.4 GHz from an input

frequency of 2 kHz to 710 MHz

ꢀ Ultra-low jitter clock outputs with jitter generation as

low as 0.3 ps rms (50 kHz–80 MHz)

ꢀ Integrated loop filter with selectable loop bandwidth

(60 Hz to 8.4 kHz)

ꢀ Meets OC-192 GR-253-CORE jitter specifications

ꢀ Clock or crystal input with manual clock selection

ꢀ Clock output selectable signal format

(LVPECL, LVDS, CML, CMOS)

ꢀ Support for ITU G.709 and custom FEC ratios

(255/238, 255/237, 255/236)

ꢀ Supports various frequency translations for

Synchronous Ethernet

ꢀ LOL, LOS alarm outputs

ꢀ I C or SPI programmable

ꢀ On-chip voltage regulator for 1.8 V ±5%, 2.5 or

Applications

3.3 V ±10% operation

ꢀ

SONET/SDH OC-48/STM-16 and OC-192/STM-64

line cards

ꢀ Small size: 6 x 6 mm 36-lead QFN

ꢀ Pb-free, ROHS compliant

ꢀ

GbE/10GbE, 1/2/4/8/10GFC line cards

ITU G.709 and custom FEC line cards

Optical modules

Wireless basestations

Data converter clocking

xDSL

Synchronous Ethernet

Test and measurement

Discrete PLL replacement

Broadcast video

Xtal or Refclock

÷ NC1_LS

CKOUT

÷ N32

DSPLL

N1_HS

÷ N31

CKIN

÷ N2

VDD (1.8, 2.5, or 3.3 V)

GND

Loss of Signal

Loss of Lock

Control

Signal Detect

I²C/SPI Port

Xtal/Clock Select

Device Interrupt

Rate Select

Preliminary Rev. 0.3 1/08

Si5319

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

12 3 4 5 6 7...16

中文翻译

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与SI5319B-C-GMR相关器件

型号	品牌	获取价格	描述	数据表
SI5319C-C-GM	SILICON	获取价格	Clock Generator, 364MHz, CMOS, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36
SI5319C-C-GMR	SILICON	获取价格	Clock Generator, 364MHz, CMOS, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36
SI5319-H	KODENSHI	获取价格	LAMP,IRED,950NM PEAK WAVELENGTH,LED-2B
SI5319-H(B)	KODENSHI	获取价格	LAMP,IRED,950NM PEAK WAVELENGTH,LED-2B
SI532	SILICON	获取价格	DUAL FREQUENCY XO (10 MHZ TO 1.4 GHZ)
SI5320	ETC	获取价格	SONET/SDH PRECISION CLOCK MULTIPLIER IC
SI5320-EVB	ETC	获取价格	EVALUATION BOARD FOR Si5320 SONET/SDH PRECISION CLOCK MULTIPLIER IC
SI5320-X-BC	ETC	获取价格	SONET/SDH PRECISION CLOCK MULTIPLIER IC
SI5321	ETC	获取价格	SONET/SDH PRECISION CLOCK MULTIPLIER IC
SI5321-G-XC5	SILICON	获取价格	Support Circuit, 1-Func, CBGA63, 9 X 9 MM, CERAMIC, MO-192AAB-1, BGA-63

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