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SI5020C-BA

更新时间: 2024-11-25 03:32:07
品牌 Logo 应用领域
芯科 - SILICON ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式PC
页数 文件大小 规格书
14页 208K
描述
Si5020 MICRO PCB WITH S3050 FOOTPRINT

SI5020C-BA 技术参数

生命周期:Active零件包装代码:MODULE
包装说明:,针数:32
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.76Is Samacsys:N
JESD-30 代码:S-XXMA-N32长度:9.05 mm
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装形状:SQUARE
封装形式:MICROELECTRONIC ASSEMBLY座面最大高度:2.27 mm
标称供电电压:5 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.8 mm
端子位置:UNSPECIFIED宽度:9.05 mm
Base Number Matches:1

SI5020C-BA 数据手册

 浏览型号SI5020C-BA的Datasheet PDF文件第2页浏览型号SI5020C-BA的Datasheet PDF文件第3页浏览型号SI5020C-BA的Datasheet PDF文件第4页浏览型号SI5020C-BA的Datasheet PDF文件第5页浏览型号SI5020C-BA的Datasheet PDF文件第6页浏览型号SI5020C-BA的Datasheet PDF文件第7页 
Si5020C-BA  
Si5020 MICRO PCB WITH S3050 FOOTPRINT  
Features  
Supports substitution of the DSPLL™ technology eliminates  
Si5020 in systems designed  
for AMCC S3050 footprint  
external loop filter components  
Excellent jitter generation performance:  
Simplifies evaluation of the  
3.0 mUIrms (typical)  
Si5020 device  
Low power consumption: 108 mA at  
OC-48 (typical)  
Ordering Information:  
Wide supply voltage range: 3 to 6 V  
See page 11.  
Applications  
Replacement for S3050  
In-system evaluation of the Si5020 SiPHYTM multi-rate SONET/SDH  
Pin Assignments  
Si5020C-BA  
clock and data recovery IC  
Description  
The Si5020C-BA is a micro printed circuit board (PCB) that allows use of  
the Si5020 clock and data recovery (CDR) device in communications  
systems originally designed for the AMCC S3050. No system circuit board  
changes are necessary because the micro PCB is pin-compatible with the  
S3050.  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
3
4
5
6
7
8
NC  
VCC  
RATESEL1  
SERCLKOP  
SERCLKON  
VEE  
VEE  
VEE  
SERDATIP  
SERDATIN  
NC  
NC  
SERDATOP  
SERDATON  
NC  
REFCLKP  
The Si5020 device offers significant advantages in jitter performance,  
power dissipation, ease of use, and size over competing CDRs. The  
Si5020 incorporates Silicon Laboratories’ DSPLL™ technology for  
improved performance and ease of use. DSPLL technology eliminates  
external loop filter components and their associated noise entry points,  
thus making the Si5020 CDR less susceptible to board-level interaction  
and helping to ensure optimal jitter performance.  
Top View  
Functional Block Diagram  
RATESEL0  
LOCKDET  
RATESEL1  
Inverter  
SERDATIP  
SERDATIN  
DIN+  
DIN–  
DOUT+  
DOUT–  
SERDATOP  
SERDATON  
Si5020  
CDR  
REFCLKP  
REFCLKN  
VCC  
REFCLK+  
REFCLK–  
CLKOUT+  
CLKOUT–  
SERCLKOP  
SERCLKON  
IN  
POK  
OUT  
GND  
VEE  
Regulator  
Rev. 1.0 3/04  
Copyright © 2004 by Silicon Laboratories  
Si5020C-BA-DS10  

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