Datasheet > SCM63F733ATQ10R

SCM63F733ATQ10R

更新时间： 2024-11-10 19:58:55

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		静态存储器内存集成电路
页数	文件大小	规格书
17页	242K
描述
128KX32 CACHE SRAM, 10ns, PQFP100, TQFP-100

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

SCM63F733ATQ10R 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	TQFP-100	Reach Compliance Code：	unknown
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.62	最长访问时间：	10 ns
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
长度：	20 mm	内存密度：	4194304 bit
内存集成电路类型：	CACHE SRAM	内存宽度：	32
功能数量：	1	端子数量：	100
字数：	131072 words	字数代码：	128000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	128KX32
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, LOW PROFILE
并行/串行：	PARALLEL	认证状态：	Not Qualified
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	QUAD	宽度：	14 mm
Base Number Matches：	1

SCM63F733ATQ10R 数据手册

Order this document

by MCM63F733A/D

SEMICONDUCTOR TECHNICAL DATA

MCM63F733A

SCM63F733A

128K x 32 Bit Flow–Through

BurstRAM Synchronous

Fast Static RAM

The MCM63F733A and SCM63F733A are 4M–bit synchronous fast static

RAMs designed to provide a burstable, high performance, secondary cache for

the PowerPC and other high performance microprocessors. They are orga-

nized as 128K words of 32 bits each, fabricated with high performance silicon

gate CMOS technology. This device integrates input registers, a 2–bit address

counter, andhighspeedSRAMontoasinglemonolithic circuitforreducedparts

count in cache data RAM applications. Synchronous design allows precise

cycle control with the use of an external clock (K). CMOS circuitry reduces the

overall power consumption of the integrated functions for greater reliability.

Addresses (SA), data inputs (DQx), and all control signals except output

enable (G) and Linear Burst Order (LBO) are clock (K) controlled through

positive–edge–triggered noninverting registers.

TQ PACKAGE

TQFP

CASE 983A–01

Bursts can be initiated with either ADSP or ADSC input pins. Subsequent burst

addresses can be generated internally by the MCM63F733A and SCM63F733A

(burst sequence operates in linear or interleaved mode dependent upon state of

LBO) and controlled by the burst address advance (ADV) input pin.

Write cycles are internally self–timed and are initiated by the rising edge of the

clock (K) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

Synchronous byte write (SBx), synchronous global write (SGW), and synchro-

nous write enable (SW) are provided to allow writes to either individual bytes or

to all bytes. The four bytes are designated as “a”, “b”, “c”, and “d”. SBa controls

DQa, SBb controls DQb, etc. Individual bytes are written if the selected byte

writes SBx are asserted with SW. All bytes are written if either SGW is asserted

or if all SBx and SW are asserted.

For read cycles, a flow–through SRAM allows output data to simply flow freely

from the memory array.

The MCM63F733A and SCM63F733A operate from a 3.3 V core power supply

and all outputs operate on a 2.5 V or 3.3 V power supply. All inputs and outputs

are JEDEC Standard JESD8–5 compatible.

•

MCM63F733A–8.5 = 8.5 ns Access

MCM63F733A–9 = 9 ns Access

MCM63F733A/SCM63F733A–10 = 10 ns Access

MCM63F733A/SCM63F733A–11 = 11 ns Access

3.3 V + 10%/– 5% Core, Power Supply, 2.5 V or 3.3 V I/O Supply

ADSP, ADSC, and ADV Burst Control Pins

Selectable Burst Sequencing Order (Linear/Interleaved)

Internally Self–Timed Write Cycle

Byte Write and Global Write Control

Single–Cycle Deselect

Sleep Mode (ZZ)

•

– 40 to 85°C Extended Operating Temperatures (SCM63F733A only)

100–Pin TQFP Package

The PowerPC name is a trademark of IBM Corp., used under license therefrom.

REV 4

10/26/99

Motorola, Inc. 1999

MOTOROLA FAST SRAM

MCM63F733A•SCM63F733A

12 3 4 5 6 7...17

中文翻译

下载PDF

与SCM63F733ATQ10R相关器件

型号	品牌	获取价格	描述	数据表
SCM63F733ATQ11	MOTOROLA	获取价格	128KX32 CACHE SRAM, 11ns, PQFP100, TQFP-100
SCM63F733ATQ11	NXP	获取价格	IC,SYNC SRAM,128KX32,CMOS,QFP,100PIN,PLASTIC
SCM63F733ATQ11R	MOTOROLA	获取价格	128KX32 CACHE SRAM, 11ns, PQFP100, TQFP-100
SCM63F733ATQ11R	NXP	获取价格	IC,SYNC SRAM,128KX32,CMOS,QFP,100PIN,PLASTIC
SCM63P733ATQ133	NXP	获取价格	128KX32 CACHE SRAM, 4ns, PQFP100, TQFP-100
SCM63P733ATQ133	MOTOROLA	获取价格	128KX32 CACHE SRAM, 4ns, PQFP100, TQFP-100
SCM63P733ATQ133R	MOTOROLA	获取价格	Cache SRAM, 128KX32, 4ns, CMOS, PQFP100, TQFP-100
SCM63P733ATQ133R	NXP	获取价格	IC,SYNC SRAM,128KX32,CMOS,QFP,100PIN,PLASTIC
SCM6926WJ10C	MOTOROLA	获取价格	128KX8 STANDARD SRAM, 10ns, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
SCM6926WJ10RC	MOTOROLA	获取价格	128KX8 STANDARD SRAM, 10ns, PDSO32, 0.400 INCH, PLASTIC, SOJ-32

与SCM63F733ATQ10R相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

24
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

24
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

50
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

40

产品中心

服务支持

精选活动

关于我们

帮助中心

SCM63F733ATQ10R

SCM63F733ATQ10R 技术参数

SCM63F733ATQ10R 数据手册

与SCM63F733ATQ10R相关器件

与SCM63F733ATQ10R相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SCM63F733ATQ10R

SCM63F733ATQ10R 技术参数

SCM63F733ATQ10R 数据手册

与SCM63F733ATQ10R相关器件

与SCM63F733ATQ10R相关文章

您还可以找

您在本页遇到什么问题？