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PO74G38074ASR PDF预览

PO74G38074ASR

更新时间: 2024-11-15 06:04:35
品牌 Logo 应用领域
POTATO 时钟驱动器
页数 文件大小 规格书
5页 473K
描述
3.3V 1:4 CMOS Clock Driver

PO74G38074ASR 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.81
Base Number Matches:1

PO74G38074ASR 数据手册

 浏览型号PO74G38074ASR的Datasheet PDF文件第2页浏览型号PO74G38074ASR的Datasheet PDF文件第3页浏览型号PO74G38074ASR的Datasheet PDF文件第4页浏览型号PO74G38074ASR的Datasheet PDF文件第5页 
PO74G38074A  
3.3V 1:4 CMOS Clock Driver  
02/13/07  
900MHz TTL/CMOS Potato Chip  
FEATURES:  
DESCRIPTION:  
. Patented technology  
Potato Semiconductor’s PO74G38074A is designed for  
world top performance using submicron CMOS  
technology to achieve 900MHz TTL output frequency  
with less than 50ps output pin to pin skew.  
. Operating frequency up to 900MHz with 2pf load  
. Operating frequency up to 700MHz with 5pf load  
. Operating frequency up to 350MHz with 15pf load  
. Operating frequency up to 180MHz with 50pf load  
. Very low output pin to pin skew < 50ps  
. VCC = 1.65V to 3.6V  
. Propagation delay < 1.5ns max with 15pf load  
. Low input capacitance: 3pf typical  
. 1:4 fanout  
PO74G38074A is a 3.3V CMOS 1 input to 4 outputs  
Buffered driver to achieve 900MHz output frequency.  
Typical applications are clock and signal distribution.  
Inputs can be driven from either 3.3V or 5V devices.  
This feature allows the use of these devices as  
translators in a mixed 3.3V/5V system environment.  
. Available in 8 pin SOIC package  
Pin Configuration  
Logic Block Diagram  
O1  
VCC  
VCC  
IN  
O4  
O3  
O2  
1
8
7
O2  
2
3
4
IN  
6
5
O3  
GND  
O1  
O4  
Pin Description  
Pin Name  
Description  
IN  
Input  
Ox  
Outputs  
1
Copyright © Potato Semiconductor Corporation  

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