Datasheet > PO74HSTL314A

PO74HSTL314A

更新时间： 2024-11-15 06:04:35

品牌	Logo	应用领域
POTATO		时钟
页数	文件大小	规格书
7页	583K
描述
3.3V 2:4 Differential Clock/Data Fanout Buffer

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

PO74HSTL314A 数据手册

PO74HSTL314A

3.3V 2:4 Differential Clock/Data Fanout Buffer

07/28/06

500MHz HSTL Potato Chip

DESCRIPTION:

FEATURES:

The PO74HSTL314 is a low-skew, 2-to-4 differential

fanout buffer targeted to meet the requirements of

high-performance clock and data distribution applications.

The device is implemented on 0.35um CMOS technology

and has a fully differential internal architecture that is

optimized to achieve low signal skews at operating

frequencies of up to 500MHz .

. Patented Technology

. Four HSTL differential outputs

. The two pair of LVDS/LVPECL/HSTL/ differential

or single-ended inputs

. Hot-swappable/-insertable

. Operating frequency up to 500MHz with 2pf load

. Operating frequency up to 480MHz with 5pf load

. Operating frequency up to 400MHz with 15pf load

. Very low output pin to pin skew < 80ps

. Very low pulse skew < 80ps

. 2.8-ns propagation delay (typical)

. 2.4V to 3.6V power supply

. Industrial temperature range: –40°C to 85°C

. 20-pin 209 mil SSOP package

The device features two differential input paths that are

multiplexed plexed internally. This mux is controlled by

the CLK_SEL pin. The PO74HSTL314 may function not

only as a differential clock buffer but also as a signal-level

translator and fanout on HSTL or LVCMOS / LVTTL

single-ended signal to four HSTL differential loads.

Since the PO74HSTL314 introduces negligible jitter to the

timing budget, it is the ideal choice for distributing high

frequency, high precision clocks across back-planes and

boards in communication systems.

Pin Configuration

Logic Block Diagram

Q0#

VCC

CLKA

CLKA#

Q1#

Q0#

Q1#

VCC

VEE

CLK_SEL

VCC

CLKA

CLKA#

CLKB

CLKB#

VEE

Q2#

CLKB

CLKB#

Q2#

Q3#

VEE

CLK_SEL

Q3#

VCC

VEE

12 3 4 5 6 7

中文翻译

下载PDF

与PO74HSTL314A相关器件

型号	品牌	获取价格	描述	数据表
PO74HSTL314ASR	POTATO	获取价格	3.3V 2:4 Differential Clock/Data Fanout Buffer
PO74HSTL314ASU	POTATO	获取价格	3.3V 2:4 Differential Clock/Data Fanout Buffer
PO74HSTL85331A	POTATO	获取价格	3.3V 1:4 Crystal Oscillator/ Differential Clock or Data Fanout Buffer
PO74HSTL85331ATR	POTATO	获取价格	3.3V 1:4 Crystal Oscillator/ Differential Clock or Data Fanout Buffer
PO74HSTL85331ATU	POTATO	获取价格	3.3V 1:4 Crystal Oscillator/ Differential Clock or Data Fanout Buffer
PO74HSTL85350A	POTATO	获取价格	LVCMOS Input to HSTL Output 1:4 Fanout Buffer
PO74HSTL85350ATR	POTATO	获取价格	LVCMOS Input to HSTL Output 1:4 Fanout Buffer
PO74HSTL85350ATU	POTATO	获取价格	LVCMOS Input to HSTL Output 1:4 Fanout Buffer
PO74HSTL85352A	POTATO	获取价格	The PO74HSTL85352A is a low-skew, 1-to-2 differential fanout buffer targeted to meet the r
PO74HSTL85352A_14	POTATO	获取价格	LVCMOS Input to HSTL Output 1:2 Fanout Buffer