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PI74AVC+16501K PDF预览

PI74AVC+16501K

更新时间: 2024-10-27 23:27:39
品牌 Logo 应用领域
其他 - ETC 总线收发器触发器逻辑集成电路电视光电二极管
页数 文件大小 规格书
10页 512K
描述
18-Bit Bus Transceiver

PI74AVC+16501K 数据手册

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PI74AVC+16501  
18-Bit Universal Bus Transceiver  
With 3-State Outputs  
Product Features  
ProductDescription  
Pericom Semiconductor’s PI74AVC+ series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
PI74AVC+16501 is designed for low voltage operation,  
V
CC  
= 1.65V to 3.6V  
True ±24mA Balanced Drive @ 3.3V  
I supports partial Power-down operation  
The18-bitPI74AVC+16501univeralbustransceiverisdesignedfor  
OFF  
1.65Vto3.6VV operation.  
CC  
3.6V I/O Tolerant inputs and outputs  
Data flow in each direction is controlled by Output Enable (OEAB  
andOEBA), Latch Enable(LEABandLEBA), andCLOCK(CLKAB  
and CLKBA) inputs. For A-to-B data flow, the device operates in  
the transparent mode when LEAB is HIGH. When LEAB is LOW,  
the A data is latched if CLKAB is held at a high or low logic level.  
If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on  
the low-to-high transition of CLKAB. When OEAB is HIGH, the  
outputsareactive.WhenOEABisLOW,theoutputsareinthehigh-  
impedance state.  
All outputs contain a potential DDC (Dynamic Drive Control)  
that reduces noise without degradating propagation delay.  
Industrial operation at –40°C to +85°C  
Packages available:  
– 56-pin 240 mil wide plastic TSSOP (A)  
– 56-pin 173 mil wide plastic TVSOP (K)  
DataflowforBtoAissimilartothatofAtoBbutusesOEBA,LEBA,  
and CLKBA. The Output Enables are complementary (OEAB is  
active HIGH and OEBA is active LOW)  
To ensure the high-impedance state during power up or power  
down, OEBA should be tied to V through a pull-up resistor and  
CC  
OEAB should be tied to GND through a pulldown resistor; the  
minimumvalue of the resistor is determined by the current-sinking  
capability of the driver.  
LogicBlockDiagram  
PS8541 05/01/01  
1

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