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PI74ALVTC16646KX PDF预览

PI74ALVTC16646KX

更新时间: 2024-10-29 05:24:19
品牌 Logo 应用领域
百利通 - PERICOM 光电二极管逻辑集成电路电视
页数 文件大小 规格书
9页 159K
描述
Registered Bus Transceiver, ALVT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.173 INCH, PLASTIC, TVSOP-56

PI74ALVTC16646KX 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.92
系列:ALVTJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:11.3 mm
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):235
传播延迟(tpd):5.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

PI74ALVTC16646KX 数据手册

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PI74ALVTC16646  
2.5V 16-Bit Bus Transceiver and  
Register with 3-State Outputs  
ProductDescription  
Product Features  
Pericom Semiconductor’s PI74ALVTC series of logic circuits are  
produced using the Company’s advanced 0.35 micron CMOS  
technology, achieving industry leading speed.  
• PI74ALVTC16646isdesignedforlowvoltageoperation,  
V
DD  
=1.65Vto3.6V  
• Supports Live Insertion  
The PI74ALVTC16646 is a 16-bit bus transceiver and register  
• 3.6V I/O Tolerant Inputs and Outputs  
• Bus Hold  
designed for 1.65V to 3.6V V operation. It can be used as two 8-  
CC  
bit transceivers or one 16-bit transceiver. Data on the A or B bus is  
clocked into the registers on the low-to-high transition of the  
appropriate Clock (CLKAB or CLKBA) input. Four fundamental  
bus-management functions can be performed.  
• HighDrive,–32/64mA@3.3V  
• Uses patented noise reduction circuitry  
• Power-off high impedance inputs and outputs  
• Industrial operation at –40°C to +85°C  
• Packagesavailable:  
OutputEnable(OE)andDirectionControl(DIR)inputsareprovided  
to control the transceiver functions. In the transceiver mode, data  
present at the high-impedance port may be stored in either register  
orinboth. TheSelectControl(SABandSBA)inputscanmultiplex  
stored and real-time (transparent mode) data. Circuitry used for  
Select Control eliminates the typical decoding glitch that occurs in  
a multiplexer during the transition between stored and real-time  
data. DIRdetermineswhichbusreceivesdatawhenOEisLOW. In  
theisolationmode(OEHIGH), Adatamaybestoredinoneregister  
and/or B data may be stored in the other register.  
–56-pin240-milwideplasticTSSOP(A56)  
–56-pin173-milwideplasticTVSOP(K56)  
Logic Block Diagrams  
56  
1OE  
1
1DIR  
55  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of the  
two buses, A or B, can be driven at a time.  
1CLKBA  
54  
1SBA  
2
1CLKAB  
3
1SAB  
To ensure the high-impedance state during power up or power  
One of Eight Channels  
down, OE should be tied to V through a pullup resistor; the  
minimum value of the resistor is determined by the current-sinking  
capability of the driver.  
1D  
C1  
CC  
5
1A1  
52  
1B1  
1D  
C1  
Active bus-hold circuitry is provided to hold unused or floating  
data inputs at a valid logic level.  
The family offers both I/O Tolerant, which allows it to operate in  
mixed 1.65/3.6V systems, and “Bus Hold,” which retains the data  
input’s last state preventing “floating” inputs and eliminating the  
need for pullup/down resistors.  
TO SEVEN OTHER CHANNELS  
29  
2OE  
28  
30  
2DIR  
2CLKBA  
31  
27  
2SBA  
2CLKAB  
26  
2SAB  
One of Eight Channels  
1D  
C1  
15  
2A1  
42  
2B1  
1D  
C1  
TO SEVEN OTHER CHANNELS  
PS8596  
01/22/02  
1

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