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PCA9509D,118 PDF预览

PCA9509D,118

更新时间： 2024-11-15 15:47:35
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管接口集成电路
页数 文件大小 规格书
24页 311K
描述
PCA9509 - Level translating I²C-bus/SMBus repeater SOIC 8-Pin

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PCA9509D,118 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP8,.25
针数：8Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.66
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：S-PDSO-G8
JESD-609代码：e4长度：4.9 mm
湿度敏感等级：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：SQUARE封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：1/4.5,3.3/5 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Line Driver or Receivers最大供电电压：5.5 V
最小供电电压：3 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3.9 mmBase Number Matches：1

PCA9509D,118 数据手册

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PCA9509  
Level translating I2C-bus/SMBus repeater  
Rev. 7 — 4 November 2014  
Product data sheet  
1. General description  
The PCA9509 is a level translating I2C-bus/SMBus repeater that enables processor low  
voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O. While retaining  
all the operating modes and features of the I2C-bus system during the level shifts, it also  
permits extension of the I2C-bus by providing bidirectional buffering for both the data  
(SDA) and the clock (SCL) lines, thus enabling the I2C-bus or SMBus maximum  
capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from  
1.35 V to VCC(B) 1.0 V and requires no external pull-up resistors due to the internal  
current source. Port B allows a voltage range from 3.0 V to 5.5 V and is overvoltage  
tolerant. Both port A and port B SDA and SCL pins are high-impedance when the  
PCA9509 is unpowered.  
For applications where Port A VCC(A) is less than 1.35 V or Port B VCC(B) is less than 3.0 V,  
use drop-in replacement PCA9509A.  
The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current  
sensing mechanism to detect the input or output LOW signal which prevents bus lock-up.  
Port A uses a 1 mA current source for pull-up and a 200 pull-down driver. This results in  
a LOW on the port A accommodating smaller voltage swings. The output pull-down on the  
port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the  
internal buffer is set about 50 mV lower than that of the output voltage LOW. When the  
port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.  
This prevents a lock-up condition from occurring. The output pull-down on the port B  
drives a hard LOW and the input level is set at 0.3 of SMBus or I2C-bus voltage level  
which enables port B to connect to any other I2C-bus devices or buffer.  
The PCA9509 drivers are not enabled unless VCC(A) is above 0.8 V and VCC(B) is above  
2.5 V. The enable (EN) pin can also be used to turn on and turn off the drivers under  
system control. Caution should be observed to change only the state of the EN pin when  
the bus is idle.  
2. Features and benefits  
Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device  
Voltage level translation from port A (1.35 V to VCC(B) 1.0 V) to port B (3.0 V to 5.5 V)  
Requires no external pull-up resistors on lower voltage port A  
Active HIGH repeater enable input  
Open-drain inputs/outputs  
Lock-up free operation  
Supports arbitration and clock stretching across the repeater  
Accommodates Standard-mode and Fast-mode I2C-bus devices and multiple masters  
 
 
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