Datasheet > PCA9509PDP,118

PCA9509PDP,118

更新时间： 2024-01-30 02:42:07

品牌	Logo	应用领域
恩智浦 - NXP		PC 光电二极管接口集成电路
页数	文件大小	规格书
25页	1041K
描述
PCA9509P - Low power level translating I²C-bus/SMBus repeater TSSOP 8-Pin

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PCA9509PDP,118 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	TSSOP	包装说明：	TSSOP,
针数：	8	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	1.65
接口集成电路类型：	INTERFACE CIRCUIT	JESD-30 代码：	S-PDSO-G8
长度：	3 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	座面最大高度：	1.1 mm
最大供电电压：	1.5 V	最小供电电压：	0.8 V
标称供电电压：	1.1 V	电源电压1-最大：	5.5 V
电源电压1-分钟：	2.3 V	电源电压1-Nom：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3 mm
Base Number Matches：	1

PCA9509PDP,118 数据手册

PCA9509P

Low power level translating I²C-bus/SMBus repeater

Rev. 3 — 19 July 2013

Product data sheet

1. General description

The PCA9509P is a level translating I²C-bus/SMBus repeater with two voltage supplies

that enables processor low voltage 2-wire serial bus to interface with standard I²C-bus or

SMBus I/O. While retaining all the operating modes and features of the I²C-bus system

during the level shifts, it also permits extension of the I²C-bus by providing bidirectional

buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I²C-bus or

SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a

voltage range from 0.8 V to 1.5 V and is overvoltage tolerant. Port B allows a voltage

range from 2.3 V to 5.5 V and is overvoltage tolerant. Both port A and port B SDA and

SCL pins are high-impedance when the PCA9509P is unpowered.

The bus port B drivers are compliant with SMBus I/O levels, while port A uses an offset

LOW which prevents bus lock-up and allows the bidirectional nature of the device. The

output pull-down on the port A internal buffer LOW is set for approximately 0.2V_CC(A)

while the input threshold of the internal buffer is set about 0.1V_CC(A)lower than that of the

output voltage LOW. When the port A I/O is driven LOW internally, the LOW is not

recognized as a LOW by the input. This prevents a lock-up condition from occurring. The

output pull-down on the port B drives a hard LOW and the input level is set at 0.3 of

SMBus or I²C-bus voltage level which enables port B to connect to any other I²C-bus

devices or buffer.

The PCA9509P drivers are not enabled unless V_CC(A)is above 0.7 V and V_CC(B)is above

1.7 V. The enable (EN) pin can also be used to turn on and turn off the drivers under

system control. Caution should be observed to change only the state of the EN pin when

the bus is idle.

The PCA9509P is the same as the PCA9509A but without the port A internal current

source to allow high value pull-up resistors to reduce current consumption in portable

applications.

12 3 4 5 6 7...25

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