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PC28F00AG18FF PDF预览

PC28F00AG18FF

更新时间: 2024-02-18 21:42:45
品牌 Logo 应用领域
镁光 - MICRON 存储
页数 文件大小 规格书
118页 1154K
描述
128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory

PC28F00AG18FF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:TBGA, BGA64,8X8,40
Reach Compliance Code:compliant风险等级:5.8
最长访问时间:96 ns命令用户界面:YES
通用闪存接口:YES数据轮询:NO
JESD-30 代码:R-PBGA-B64JESD-609代码:e1
长度:10 mm内存密度:1073741824 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:512
端子数量:64字数:67108864 words
字数代码:64000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64MX16封装主体材料:PLASTIC/EPOXY
封装代码:TBGA封装等效代码:BGA64,8X8,40
封装形状:RECTANGULAR封装形式:GRID ARRAY, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:1.8 V编程电压:2.7 V
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm部门规模:128K
最大待机电流:0.000185 A子类别:Flash Memories
最大压摆率:0.05 mA最大供电电压 (Vsup):2 V
最小供电电压 (Vsup):1.7 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN SILVER COPPER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
切换位:NO类型:NOR TYPE
宽度:8 mmBase Number Matches:1

PC28F00AG18FF 数据手册

 浏览型号PC28F00AG18FF的Datasheet PDF文件第2页浏览型号PC28F00AG18FF的Datasheet PDF文件第3页浏览型号PC28F00AG18FF的Datasheet PDF文件第4页浏览型号PC28F00AG18FF的Datasheet PDF文件第5页浏览型号PC28F00AG18FF的Datasheet PDF文件第6页浏览型号PC28F00AG18FF的Datasheet PDF文件第7页 
128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory  
Features  
Micron StrataFlash Embedded Memory  
P/N – PC28F128G18xx  
P/N – PC28F256G18xx  
P/N – PC28F512G18xx  
P/N – PC28F00AG18xx  
• Power  
– Core voltage: 1.7 V - 2.0 V  
– I/O voltage: 1.7 V - 2.0 V  
– Standby current: 60 μA (typ) for 512-Mbit, 65 nm  
– Deep Power-Down mode: 2 μA (typ)  
– Automatic Power Savings mode  
– 16-word synchronous-burst read current: 23 mA  
(typ) @ 108 MHz; 24 mA (typ) @ 133 MHz  
• Software  
Features  
• High-Performance Read, Program and Erase  
– 96 ns initial read access  
– 108 MHz with zero wait-state synchronous burst  
reads: 7 ns clock-to-data output  
– 133 MHz with zero wait-state synchronous burst  
reads: 5.5 ns clock-to-data output  
– 8-, 16-, and continuous-word synchronous-burst  
Reads  
– Programmable WAIT configuration  
– Customer-configurable output driver impedance  
– Buffered Programming: 2.0 μs/Word (typ), 512-  
Mbit 65 nm  
– Micron® Flash data integrator (FDI) optimized  
– Basic command set (BCS) and extended com-  
mand set (ECS) compatible  
– Common Flash interface (CFI) capable  
• Security  
– Block Erase: 0.9 s per block (typ)  
20 μs (typ) program/erase suspend  
• Architecture  
– 16-bit wide data bus  
– Multi-Level Cell Technology  
– One-time programmable (OTP) space  
64 unique factory device identifier bits  
2112 user-programmable OTP bits  
– Absolute write protection: VPP = GND  
– Power-transition erase/program lockout  
– Individual zero latency block locking  
– Individual block lock-down  
– Symmetrically-Blocked Array Architecture  
– 256-Kbyte Erase Blocks  
– 1-Gbit device: Eight 128-Mbit partitions  
– 512-Mbit device: Eight 64-Mbit partitions  
– 256-Mbit device: Eight 32-Mbit partitions  
– 128-Mbit device: Eight 16-Mbit partitions  
– Read-While-Program and Read-While-Erase  
– Status Register for partition/device status  
– Blank Check feature  
• Density and packaging  
– 128Mb, 256Mb, 512Mbit, and 1-Gbit  
– Address-data multiplexed and non-multiplexed  
interfaces  
– 64-Ball Easy BGA  
• Quality and Reliability  
– Expanded temperature: –30 °C to +85 °C  
– Minimum 100,000 erase cycles per block  
– 65nm Process Technology  
PDF: 09005aef8448483a  
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
1
© 2011 Micron Technology, Inc. All rights reserved.  
Products and specifications discussed herein are subject to change by Micron without notice.  

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